Editing Counter (digital) (section)

==Implementation==

Counters are implemented in a variety of ways, including as dedicated [[medium-scale integration|MSI]] and [[large-scale integration|LSI]] [[integrated circuit]]s, as embedded counters within [[ASIC]]s, as general-purpose counter and timer peripherals in [[microcontroller]]s, and as [[Semiconductor intellectual property core|IP blocks]] in [[FPGA]]s. In the latter case, a counter is typically instantiated by synthesizing it from a description written in [[VHDL]], [[Verilog]] or some other [[hardware description language]]. For example, the following VHDL code describes a 32-bit binary up/down counter with count enable and preload capability:

<syntaxhighlight lang="VHDL" class="skin-invert">
entity bidirectional_counter is
port (                                      -- counter input/output signals:
  CLK         : in  std_logic;              --   clock
  RESET       : in  std_logic;              --   asynchronous reset
  ENABLE      : in  std_logic;              --   count enable
  LOAD_ENABLE : in  std_logic;              --   load enable
  COUNT_UP    : in  std_logic;              --   '1' for up, '0' for down counting
  DATA_IN     : in  unsigned(31 downto 0);  --   value to load into counter
  DATA_OUT    : out unsigned(31 downto 0)   --   current counter value
);
end bidirectional_counter;

architecture behavioral of bidirectional_counter is
  signal counter : unsigned(31 downto 0) := (others => '0'); -- counter register
begin
  process(CLK, RESET)
  begin
    if RESET = '1' then             -- if counter reset is requested
      counter <= (others => '0');   --   reset the counter
    elsif rising_edge(CLK) then     -- else upon rising clock edge
      if LOAD_ENABLE = '1' then     --   if load is requested
        counter <= DATA_IN;         --     jam new value into counter 
      elsif ENABLE = '0' then       --   else if counting is disabled
        null;                       --     do nothing
      elsif COUNT_UP = '1' then     --   else if up-counting
        counter <= counter + 1;     --     increment counter
      else                          --   else down-counting, so
        counter <= counter - 1;     --     decrement counter
      end if;
    end if;
  end process;
  DATA_OUT <= counter;    -- output current counter value
end behavioral;
</syntaxhighlight>

In MSI and LSI integrated circuits, a counter is implemented as a semiconductor [[die (integrated circuit)|die]] which is [[wire bonding|bonded]] and encapsulated in a [[semiconductor package]].

<gallery heights="200px" widths="350px">
54163 TI 0423 annotated sm.jpg|Semiconductor die of a synchronous 4-bit binary counter
Toshiba 74HC163AP.jpg|Assembled synchronous 4-bit binary counter in a plastic dual-in-line package
</gallery>