Editing Transputer (section)

== Legacy ==
{{essay|section|date=February 2019}}

Growing internal parallelism has been one driving force behind improvements in conventional CPU designs. Instead of explicit thread-level parallelism (as is used in the transputer), CPU designs exploited implicit parallelism at the instruction-level, inspecting code sequences for data dependencies and issuing multiple independent instructions to different execution units. This is termed [[superscalar]] processing. Superscalar processors are suited for optimising the execution of sequentially constructed fragments of code. The combination of superscalar processing and [[speculative execution]] delivered a tangible performance increase on existing bodies of code – which were mostly written in Pascal, Fortran, C and C++. Given these substantial and regular performance improvements to existing code there was little incentive to rewrite software in languages or coding styles which expose more task-level parallelism.

Nevertheless, the model of cooperating concurrent processors can still be found in [[cluster computing]] systems that dominate [[supercomputer]] design in the 21st century. Unlike the transputer architecture, the processing units in these systems typically use superscalar CPUs with access to substantial amounts of memory and disk storage, running conventional operating systems and network interfaces. Resulting from the more complex nodes, the software architecture used for coordinating the parallelism in such systems is typically far more heavyweight than in the transputer architecture.

The fundamental transputer motive remains, yet was masked for over 20 years by the repeated doubling of transistor counts. Inevitably, microprocessor designers finally ran out of uses for the greater physical resources, almost at the same time when technology scaling began to hit its limits. Power consumption, and thus heat dissipation needs, render further [[clock rate]] increases unfeasible. These factors led the industry towards solutions little different in essence from those proposed by Inmos.

Some of the most powerful supercomputers in the world, based on designs from [[Columbia University]] and built as IBM [[Blue Gene]], are real-world incarnations of the transputer dream. They are vast assemblies of identical, relatively low-performance SoCs.

Recent trends have also tried to solve the transistor dilemma in ways that would have been too futuristic even for Inmos. On top of adding components to the CPU die and placing multiple dies in one system, modern processors increasingly place multiple cores in one die. The transputer designers struggled to fit even one core into its transistor budget. Today designers, working with a 1000-fold increase in transistor densities, can now typically place many. One of the most recent commercial developments has emerged from the firm [[XMOS]], which has developed a family of embedded multi-core multi-threaded processors which resonate strongly with the transputer and Inmos. There is an emerging class of multicore/manycore processors taking the approach of a ''network on a chip'' (NoC), such as the [[Cell (microprocessor)|Cell processor]], [[Adapteva]] Epiphany architecture, Tilera, etc.

The transputer and Inmos helped establish [[Bristol]], UK, as a hub for microelectronic design and innovation.