Editing X86 memory segmentation (section)

=== End-of-address-space quirkiness ===
{{main article|A20 line}}
The last segment, FFFFh (65535), begins at linear address FFFF0h (1048560), 16&nbsp;bytes before the end of the 20-bit address space, and thus can access, with an offset of up to 65,536&nbsp;bytes, up to 65,520 (65536−16) bytes past the end of the 20-bit address space of the 8086 or 8088 CPU. A further 4,094 next-highest 64K-segments also still cross that 1MB-threshold, but by less and less. On the 8086 and 8088 CPUs, these address accesses were wrapped around to the beginning of the address space such that 65535:16 would access address 0, and e.g. 65533:1000 would access address&nbsp;952 of the linear address space. The fact that some programs written for the 8088 and 8086 relied on this quirky wrap-around as a feature led to the [[Gate A20]] compatibility issues in later CPU generations, with the [[Intel 286]] and above, where the linear address space was expanded past 20&nbsp;bits.

In 16-bit real mode, enabling applications to make use of multiple memory segments for a single data structure (in order to access more memory than available in any one 64K-segment) is quite complex, but was viewed as a necessary evil for all but the smallest tools (which could do with less memory). The root of the problem is that no appropriate address-arithmetic instructions suitable for flat addressing of the entire memory range are available.{{Citation needed|date=July 2011}} Flat addressing is possible by applying multiple instructions, which however leads to slower programs.

The ''[[x86 memory models|memory model]]'' concept derives from the setup of the segment registers.  For example, in the ''tiny model'' CS=DS=SS, that is the program's code, data, and stack are all contained within a single 64&nbsp;KB segment. In the ''small'' memory model DS=SS, so both data and stack reside in the same segment; CS points to a different code segment of up to 64&nbsp;KB.