Editing PA-RISC (section)

==CPU specifications==
{| class="sortable wikitable"
! Image !! Model !!Marketing<br />name!!Year!!Frequency<br />[MHz]!!Memory Bus<br />[MB/s]!!Process<br />[μm]!!Transistors<br />[millions]!!Die size<br />[mm<sup>2</sup>]!!Power<br />[W]!!Dcache<br />[KB]!!Icache<br />[KB]!!L2 cache<br />[MB]!!ISA!!Notes
|-
| || TS-1 ||?||1986||8||?||?||—||—||?||64||64||—||1.0||<ref name="cpu-early">[https://www.openpa.net/pa-risc_processor_pa-early.html "PA-RISC Processors"]</ref>
|-
| || CS-1 ||?||1987||8||?||1.6||0.164||72.93||1||—||0.25||—||1.0||<ref>{{cite book |first=A. |last=Marston  |display-authors=etal|chapter=A 32b CMOS single-chip RISC type processor |title=1987 IEEE International Solid-State Circuits Conference. Digest of Technical Papers |year=1987 |pages=28–29 |doi=10.1109/ISSCC.1987.1157145 |s2cid=61007482 |ref={{harvid|ISSCC|1987}}}}</ref>
|-
| || NS-1 ||?||1987||25/30||?||1.7||0.144||70.56||?||16-128||16-128||—||1.0||<ref name="cpu-early" /><ref>{{cite book |first=J. |last=Yetter  |display-authors=etal|chapter=A 15 MIPS 32b Microprocessor |title={{harvnb|ISSCC|1987}} |year=1987 |doi=10.1109/ISSCC.1987.1157220 |pages=26–27|s2cid=58782915 }}</ref> Unified L1 cache
|-
| [[File:HP-HP9000-PA-RISC-NS2-CPU-Board-A1027-26510-RevB 03 (cropped) NS2-CPU HPC5 1FJ5-0005.jpg|80px]]
| NS-2 ||?||1989||25/30||?||1.5||0.183||196||27||512||512||—||1.0||<ref>{{cite book |first=Brian D. |last=Boschma  |display-authors=etal|chapter=A 30 MIPS VLSI CPU |doi=10.1109/ISSCC.1989.48191 |title=IEEE International Solid-State Circuits Conference, 1989 ISSCC. Digest of Technical Papers |year=1989 |pages=82–83, 299 |s2cid=53932361 }}</ref>
|-
| 
| PCX  ||?||1990||50/60||?||1.0||0.196||?||?||?||?||?||1.0||<ref name="cpu-early" />
|-
| [[File:HP-HP9000-PARISC-PA7000-CPU 001 (cropped).jpg|80px]]
| PCX-S || PA-7000 ||1991||66||?||1.0||0.58||201.6||?||256||256||—||1.1a||
|-
| [[File:HP-HP9000-PARISC-PA7100-CPU 001 (cropped).jpg|80px]]
| PCX-T || [[PA-7100]] ||1992||33–100||?||0.8||0.85||196||?||2048||1024||—||1.1b||
|-
| [[File:HP-HP9000-PARISC-PA7150-CPU 001 (cropped).jpg|80px]]
| PCX-T || [[PA-7150]] ||1994||125||?||0.8||0.85||196||?||2048||1024||—||1.1b||
|-
| [[File:Ic-photo-HP--PA-7200--(PA-RISC 7200 PCX-T CPU).JPG|80px]]
| PCX-T' || [[PA-7200]] ||1994||120||960||0.55||1.26||210||30||1024||2048||—||1.1c||
|-
| [[File:KL HP PA RISC 7100LC.jpg|80px]]
| PCX-L || [[PA-7100LC]] ||1994||60–100||?||0.75||0.9||201.6||7–11||—||1||2||1.1d||
|-
| [[File:HP PA-RISC 7300LC.jpg|80px]]
| PCX-L2 || [[PA-7300LC]] ||1996||132–180||?||0.5||9.2||260.1||?||64||64||0–8||1.1e||
|-
| [[File:HP-HP9000-PARISC-PA8000-CPU 001 (cropped).jpg|80px]]
| PCX-U || [[PA-8000]] ||1996||160–180||960||0.5||3.8||337.68||?||1024||1024||—||2.0||
|-
| [[File:HP-HP9000-PARISC-PA8200-CPU 001 (cropped).jpg|80px]]
| PCX-U+ || [[PA-8000#PA-8200|PA-8200]] ||1997||200–240||960||0.5||3.8||337.68||?||2048||2048||—||2.0||
|-
| [[File:HP-HP9000-PARISC-PA8500-CPU 001 (cropped).jpg|80px]]
| PCX-W  || [[PA-8000#PA-8500|PA-8500]] ||1998||300–440||1920||0.25||140||467||?||1024||512||—||2.0||<ref name="l1000">[http://www.openpa.net/systems/hp_l1000_l2000-rp5400_rp5450.html "HP L1000 & L2000 (rp5400/rp5450) Servers"] {{Webarchive|url=https://web.archive.org/web/20180102194235/https://www.openpa.net/systems/hp_l1000_l2000-rp5400_rp5450.html |date=2 January 2018 }}, ''openpa.net''</ref>
|-
| [[File:HP-HP9000-PARISC-PA8600-CPU 001 (cropped).jpg|80px]]
| PCX-W+ || [[PA-8000#PA-8600|PA-8600]] ||2000||360–550||1920||0.25||140||467||?||1024||512||—||2.0||<ref name="l1000" />
|-
| [[File:HP-HP9000-PARISC-PA8700-CPU 002 (cropped).jpg|80px]]
| PCX-W2 || [[PA-8000#PA-8700|PA-8700]](+) ||2001||625–875||1920||0.18||186||304||<7.1@1.5&nbsp;V||1536||768||—||2.0||
|-
| [[File:HP-HP9000-PARISC-PA8800-CPU 001 (cropped).jpg|80px]]
| Mako || [[PA-8800#PA-8800|PA-8800]] ||2003||800–1000||6400||0.13||300||361||?||768/core||768/core||0 or 32||2.0||
|-
| [[File:HP-HP9000-PARISC-PA8900-CPU 001 (cropped).jpg|80px]]
| Shortfin || [[PA-8000#PA-8900|PA-8900]] ||2005||800–1100||6400||0.13||?||?||?||768/core||768/core||0 or 64||2.0||
|}