Editing Intel 4004 (section)

===Original concept===
In April 1969, [[Busicom]] approached [[Intel]] and asked them to produce a twelve-chip set to handle the operations for an [[electronic calculator]].<ref name="IntelEra"/> They based their design on the architecture of the 1965 [[Olivetti Programma&nbsp;101]], one of the world's first tabletop [[programmable calculator]]s.<ref>{{cite web |url=https://www.oldcalculatormuseum.com/c-programma101.html |title=Olivetti Programma 101 Electronic Calculator |website=The Old Calculator Web Museum |quote=technically, the machine was a programmable calculator, not a computer.}}</ref><ref>{{Cite web
 | title= 2008/107/1 Computer, Programma 101, and documents (3), plastic / metal / paper / electronic components, hardware architect Pier Giorgio Perotto, designed by Mario Bellini, made by Olivetti, Italy, 1965–1971
 | website= www.powerhousemuseum.com
 | language= en
 | url= http://www.powerhousemuseum.com/collection/database/?irn=378406
 | access-date= March 20, 2016
}}
</ref> The key difference was that the Busicom design would use [[integrated circuit]]s to replace the [[printed circuit]] boards filled with individual components, and solid-state [[shift register]]s for memory instead of the costly [[Delay-line memory#Magnetostrictive delay lines|magnetostriction wire]] in the 101.

In contrast to earlier calculator designs, Busicom had developed a general-purpose processor concept with the goal of introducing it in a low-end desktop printing calculator, and then using the same design for other roles like [[cash register]]s and [[automatic teller machine]]s. The company had already produced a calculator using [[transistor-transistor logic|TTL]] [[small-scale integration]] logic ICs and were interested in having Intel reduce the chip count using Intel's [[medium-scale integration]] (MSI) techniques.{{sfn|Faggin|Hoff|Mazor|Shima|1996|p=10}}

Intel assigned the recently hired [[Marcian Hoff]], employee number 12, to act as the liaison between the two companies. In late June, three engineers from Busicom, [[Masatoshi Shima]] and his colleagues Masuda and Takayama, traveled to Intel to introduce the design. Although he had only been assigned to liaise with the engineers, Hoff began studying the concept. Their initial proposal had seven ICs: program control, [[Arithmetic logic unit|arithmetic unit]] (ALU), timing, program ROM, shift registers for temporary memory, printer controller and [[input/output]] control.{{sfn|Faggin|Hoff|Mazor|Shima|1996|p=11}}

Hoff became concerned that the number of chips and the required interconnections between them would make Busicom's price goals impossible to meet. Combining the chips would reduce the complexity and cost. He was also concerned that the still-small Intel would not have enough design staff to make seven separate chips at the same time. He raised these concerns with upper management, and [[Bob Noyce]], the CEO, told Hoff he would support a different approach if it seemed feasible.{{sfn|Faggin|Hoff|Mazor|Shima|1996|p=11}}