Editing Industry Standard Architecture (section)

==ISA bus architecture==
{| class="floatright"  
| style="vertical-align:top; padding:0; border-spacing:0; border-collapse: collapse;" | <br/>[[File:XT Bus pins.svg|220px|right]]
| style="vertical-align:top; padding:0; border-spacing:0; border-collapse: collapse;" | [[File:ISA Bus pins.svg|470px|right]]
|}

The '''PC/XT-bus''' is an eight-[[bit]] ISA bus used by [[Intel 8086]] and [[Intel 8088]] systems in the [[IBM PC]] and [[IBM PC XT]] in the 1980s. Among its 62 pins were [[demultiplex]]ed and electrically buffered versions of the 8 data and 20 address lines of the 8088 processor, along with power lines, clocks, read/write strobes, interrupt lines, etc. Power lines included −5&nbsp;V and ±12&nbsp;V in order to directly support [[PMOS logic|pMOS]] and enhancement mode [[NMOS logic|nMOS]] circuits such as dynamic RAMs among other things. The XT bus architecture uses a single [[Intel 8259]] [[Programmable Interrupt Controller|PIC]], giving eight vectorized and prioritized interrupt lines. It has four [[direct memory access|DMA]] channels originally provided by the [[Intel 8237]].  Three of the DMA channels are brought out to the XT bus expansion slots; of these, 2 are normally already allocated to machine functions (diskette drive and hard disk controller):

{| class="wikitable"
! DMA channel !! Expansion !! Standard function
|-
| 0 || No  || [[Dynamic random-access memory]] refresh
|-
| 1 || Yes || Add-on cards
|-
| 2 || Yes || [[Floppy disk]] controller
|-
| 3 || Yes || [[Hard disk]] controller
|}
The '''PC/AT-bus''', a 16-[[bit]] (or 80286-) version of the PC/XT bus, was introduced with the [[IBM PC/AT]]. This bus was officially termed ''I/O Channel'' by IBM.{{cn|date=January 2021}} It extends the XT-bus by adding a second shorter [[edge connector]] in-line with the eight-bit XT-bus connector, which is unchanged, retaining compatibility with most 8-bit cards. The second connector adds four additional address lines for a total of 24, and 8 additional data lines for a total of 16. It also adds new interrupt lines connected to a second [[Intel 8259|8259 PIC]] (connected to one of the lines of the first) and 4 × 16-bit DMA channels, as well as control lines to select 8- or 16-bit transfers.

The 16-bit AT bus slot originally used two standard edge connector sockets in early IBM PC/AT machines. However, with the popularity of the AT architecture and the 16-bit ISA bus, manufacturers introduced specialized 98-pin connectors that integrated the two sockets into one unit. These can be found in almost every AT-class PC manufactured after the mid-1980s. The ISA slot connector is typically black (distinguishing it from the brown EISA connectors and white PCI connectors).

===Number of devices===
Motherboard devices have dedicated IRQs (not present in the slots).  16-bit devices can use either PC-bus or PC/AT-bus IRQs. It is therefore possible to connect up to 6 devices that use one 8-bit IRQ each and up to 5 devices that use one 16-bit IRQ each. At the same time, up to 4 devices may use one 8-bit DMA channel each, while up to 3 devices can use one 16-bit DMA channel each.

===Varying bus speeds===
Originally, the bus clock was synchronous with the CPU clock, resulting in varying bus clock frequencies among the many different IBM clones on the market (sometimes as high as 16 or 20&nbsp;MHz), leading to software or electrical timing problems for certain ISA cards at bus speeds they were not designed for. Later motherboards or integrated [[chipset]]s used a separate clock generator, or a clock divider which either fixed the ISA bus frequency at 4, 6, or 8&nbsp;MHz<ref>{{cite book | url=https://books.google.com/books?id=KrE0GGzOQ6oC&dq=isa+slot+speed&pg=PA557 | title=A+: Training Guide | isbn=978-0-7897-3044-2 | last1=Brooks | first1=Charles J. | date=2003 | publisher=Que }}</ref> or allowed the user to adjust the frequency via the [[BIOS]] setup. When used at a higher bus frequency, some ISA cards (certain [[Hercules Graphics Card|Hercules-compatible]] video cards, for instance), could show significant performance improvements.

===8/16-bit incompatibilities===
Memory address decoding for the selection of 8 or 16-bit transfer mode was limited to 128&nbsp;KB sections, leading to problems when mixing 8- and 16-bit cards as they could not co-exist in the same 128&nbsp;KB area. This is because the MEMCS16 line is required to be set based on the value of LA17-23 only.