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== Architecture == [[File:80386DX arch.png|300px|thumb|left|Block diagram of the i386 [[microarchitecture]]]] {| class="infobox" style="font-size:88%;width:33em;" |- |+ i386 registers |- | {| style="font-size:88%" |- | style="width:10px; text-align:center"| <sup>3</sup><sub>1</sub> | style="width:120px; text-align:center"| ... | style="width:10px; text-align:center"| <sup>1</sup><sub>5</sub> | style="width:50px; text-align:center"| ... | style="width:10px; text-align:center"| <sup>0</sup><sub>7</sub> | style="width:35px; text-align:center"| ... | style="width:10px; text-align:center"| <sup>0</sup><sub>0</sub> | style="width:auto; background:white; color:black" | ''(bit position)'' |- |colspan="8" | '''Main registers''' ''(8/16/32 bits)'' |- style="background:silver;color:black;text-align:left" | style="text-align:center" colspan="2"| EAX | style="text-align:center" colspan="2"| AX | style="text-align:center" colspan="3"| AL | style="background:white; color:black"| '''A'''ccumulator register |- style="background:silver;color:black;text-align:left" | colspan="2" style="text-align:center" | ECX | colspan="2" style="text-align:center" | CX | colspan="3" style="text-align:center" | CL | style="background:white; color:black" | '''C'''ount register |- style="background:silver;color:black;text-align:left" | colspan="2" style="text-align:center" | EDX | colspan="2" style="text-align:center" | DX | colspan="3" style="text-align:center" | DL | style="background:white; color:black" | '''D'''ata register |- style="background:silver;color:black;text-align:left" | style="text-align:center" colspan="2"| EBX | style="text-align:center" colspan="2"| BX | style="text-align:center" colspan="3"| BL | style="background:white; color:black"| '''B'''ase register |- |colspan="8" | '''Index registers''' ''(16/32 bits)'' |- style="background:silver;color:black" | colspan="2" style="text-align:center" | ESP | colspan="5" style="text-align:center" | SP | style="background:white; color:black" | '''S'''tack '''P'''ointer |- style="background:silver;color:black" | colspan="2" style="text-align:center" | EBP | colspan="5" style="text-align:center" | BP | style="background:white; color:black" | '''B'''ase '''P'''ointer |- style="background:silver;color:black" | style="text-align:center" colspan="2"| ESI | style="text-align:center" colspan="5"| SI | style="background:white; color:black"| '''S'''ource '''I'''ndex |- style="background:silver;color:black" | style="text-align:center" colspan="2"| EDI | style="text-align:center" colspan="5"| DI | style="background:white; color:black"| '''D'''estination '''I'''ndex |- |colspan="8" | '''Program counter''' ''(16/32 bits)'' |- style="background:silver;color:black" | style="text-align:center" colspan="2"| EIP | style="text-align:center" colspan="5"| IP | style="background:white; color:black"| '''I'''nstruction '''P'''ointer |- |colspan="8" | '''Segment selectors''' ''(16 bits)'' |- style="background:silver;color:black" | style="text-align:center;background:#FFF" colspan="2"| | style="text-align:center" colspan="5"| CS | style="background:white; color:black"| '''C'''ode '''S'''egment |- style="background:silver;color:black" | style="text-align:center;background:#FFF" colspan="2"| | style="text-align:center" colspan="5"| DS | style="background:white; color:black"| '''D'''ata '''S'''egment |- style="background:silver;color:black" | style="text-align:center;background:#FFF" colspan="2"| | style="text-align:center" colspan="5"| ES | style="background:white; color:black"| '''E'''xtra '''S'''egment |- style="background:silver;color:black" | style="text-align:center;background:#FFF" colspan="2"| | style="text-align:center" colspan="5"| FS | style="background:white; color:black"| '''F''' '''S'''egment |- style="background:silver;color:black" | style="text-align:center;background:#FFF" colspan="2"| | style="text-align:center" colspan="5"| GS | style="background:white; color:black"| '''G''' '''S'''egment |- style="background:silver;color:black" | style="text-align:center;background:#FFF" colspan="2"| | style="text-align:center" colspan="5"| SS | style="background:white; color:black"| '''S'''tack '''S'''egment |} {| style="font-size:88%" |- |colspan="20" | '''Status register''' |- | style="width:20px; text-align:center"| | style="width:10px; text-align:center"| <sup>1</sup><sub>7</sub> | style="width:10px; text-align:center"| <sup>1</sup><sub>6</sub> | style="width:10px; text-align:center"| <sup>1</sup><sub>5</sub> | style="width:10px; text-align:center"| <sup>1</sup><sub>4</sub> | style="width:10px; text-align:center"| <sup>1</sup><sub>3</sub> | style="width:10px; text-align:center"| <sup>1</sup><sub>2</sub> | style="width:10px; text-align:center"| <sup>1</sup><sub>1</sub> | style="width:10px; text-align:center"| <sup>1</sup><sub>0</sub> | style="width:10px; text-align:center"| <sup>0</sup><sub>9</sub> | style="width:10px; text-align:center"| <sup>0</sup><sub>8</sub> | style="width:10px; text-align:center"| <sup>0</sup><sub>7</sub> | style="width:10px; text-align:center"| <sup>0</sup><sub>6</sub> | style="width:10px; text-align:center"| <sup>0</sup><sub>5</sub> | style="width:10px; text-align:center"| <sup>0</sup><sub>4</sub> | style="width:10px; text-align:center"| <sup>0</sup><sub>3</sub> | style="width:10px; text-align:center"| <sup>0</sup><sub>2</sub> | style="width:10px; text-align:center"| <sup>0</sup><sub>1</sub> | style="width:10px; text-align:center"| <sup>0</sup><sub>0</sub> | style="width:auto; background:white; color:black" | ''(bit position)'' |- style="background:silver;color:black" | style="text-align:center;background:#FFF"| | style="text-align:center"| [[Virtual 8086 mode|V]] | style="text-align:center"| R | style="text-align:center"| 0 | style="text-align:center"| N | style="text-align:center" colspan="2"| [[IOPL]] | style="text-align:center"| [[Overflow flag|O]] | style="text-align:center"| [[Direction flag|D]] | style="text-align:center"| [[IF (x86 flag)|I]] | style="text-align:center"| [[Trap flag|T]] | style="text-align:center"| [[Sign flag|S]] | style="text-align:center"| [[Zero flag|Z]] | style="text-align:center"| 0 | style="text-align:center"| [[Adjust flag|A]] | style="text-align:center"| 0 | style="text-align:center"| [[Parity flag|P]] | style="text-align:center"| 1 | style="text-align:center"| [[Carry flag|C]] | style="background:white; color:black" | [[FLAGS register|EFlags]] |} |} The processor was a significant evolution in the [[x86]] architecture, and extended a long line of processors that stretched back to the [[Intel 8008]]. The predecessor of the 80386 was the [[Intel 80286]], a [[16-bit computing|16-bit]] processor with a [[memory segment|segment]]-based memory management and protection system. The 80386 added a three-stage instruction pipeline which it brought up to total of 6-stage instruction pipeline, extended the architecture from [[16-bit computing|16-bit]]s to [[32-bit computing|32-bit]]s, and added an on-chip [[memory management unit]].<ref>Intel Corporation, "Extending the Legacy of Leadership: The 80386 Arrives", Special 32-Bit Issue Solutions, November/December 1985, page 2</ref> This [[paging]] translation unit made it much easier to implement operating systems that used [[virtual memory]]. It also offered support for [[X86 debug register|register debugging]]. The 80386 featured three operating modes: real mode, protected mode and virtual mode. The [[protected mode]], which debuted in the 286, was extended to allow the 386 to address up to 4 [[Gigabyte|GB]] of memory. With the addition of segmented addressing system, it can expand up to 64 terabytes of virtual memory.<ref>Rant, Jon; "Extending the Legacy of Leadership: The 80386 Arrives", Intel Corporation, Special 32-Bit Issue Solutions, November/December 1985, page 2</ref> The all new [[virtual 8086 mode]] (or ''VM86'') made it possible to run one or more [[real mode]] programs in a protected environment, although some programs were not compatible. It features scaled indexing and 64-bit barrel shifter.<ref>Intel Corporation, "New Product Focus Component: A 32-Bit Microprocessor With A Little Help From Some Friends", Special 32-Bit Issue Solutions, November/December 1985, page 13</ref> The ability for a 386 to be set up to act like it had a [[flat memory model]] in protected mode despite the fact that it uses a segmented memory model in all modes was arguably the most important feature change for the x86 processor family until [[AMD]] released the [[x86-64]] in 2003. Several new instructions have been added to 386: BSF, BSR, BT, BTS, BTR, BTC, CDQ, CWDE, LFS, LGS, LSS, MOVSX, MOVZX, SETcc, SHLD, SHRD. Two new segment registers have been added (FS and GS) for general-purpose programs. The single Machine Status Word of the 286 grew into eight [[control register]]s CR0โCR7. [[X86 debug register|Debug registers]] DR0โDR7 were added for hardware breakpoints. New forms of the MOV instruction are used to access them. The chief architect in the development of the 80386 was [[John H. Crawford]].<ref>{{cite web|url=http://www.intel.com/pressroom/kits/bios/crawford.htm |title=Intel FellowโJohn H. Crawford |publisher=Intel.com |date=August 16, 2010 |access-date=September 17, 2010}}</ref> He was responsible for extending the 80286 architecture and instruction set to 32-bits, and then led the [[microprogram]] development for the 80386 chip. The [[i486]] and [[P5 (microarchitecture)|P5]] [[Pentium]] line of processors were descendants of the i386 design. === Data types === The following data types are directly supported and thus implemented by one or more i386 [[machine instruction]]s; these data types are briefly described here.<ref name="Miller2005p2" /><!--(copyrasted) <ref>[https://books.google.com/books?id=KJNpD2KimEsC&lpg=PP1&pg=PA514 page 514].</ref>-->: * ''Bit'' ([[Boolean data type|Boolean]] value), ''bit field'' (group of up to 32 bits) and ''bit string'' (up to 4 Gbit in length). * ''8-bit integer (byte)'', either signed (range โ128..127) or unsigned (range 0..255). * ''16-bit integer'', either signed (range โ32,768..32,767) or unsigned (range 0..65,535). * ''32-bit integer'', either signed (range โ2<sup>31</sup>..2<sup>31</sup>โ1) or unsigned (range 0..2<sup>32</sup>โ1). * ''Offset'', a 16- or 32-bit displacement referring to a memory location (using any addressing mode). * ''Pointer'', a 16-bit selector together with a 16- or 32-bit offset. * ''Character'' (8-bit character code). * ''String'', a sequence of 8-, 16- or 32-bit words (up to 4 Gbyte in length).<ref>{{Cite journal|last1=El-ayat|first1=K. A.|last2=Agarwal|first2=R. K.|date=December 1985|title=The Intel 80386 - Architecture And Implementation|journal=IEEE Micro|volume=5|issue=6|pages=4โ22|doi=10.1109/mm.1985.304507|s2cid=23062397|issn=0272-1732}}</ref> *''[[Binary-coded decimal|BCD]]'', decimal digits (0..9) represented by unpacked bytes. *''Packed BCD'', two BCD digits in one byte (range 0..99).
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