Editing Peripheral Component Interconnect (section)

===Combining, merging, and collapsing===
The PCI standard permits bus bridges to convert multiple bus transactions into one larger transaction under certain situations. This can improve the efficiency of the PCI bus.

====Combining====
Write transactions to consecutive addresses may be combined into a longer burst write, as long as the order of the accesses in the burst is the same as the order of the original writes.  It is permissible to insert extra data phases with all byte enables turned off if the writes are almost consecutive.

====Merging====
Multiple writes to disjoint portions of the same word may be merged into a single write with multiple byte enables asserted.  In this case, writes that were presented to the bus bridge in a particular order are merged so they occur at the same time when forwarded.

====Collapsing====
Multiple writes to the same byte or bytes may ''not'' be combined, for example, by performing only the second write and skipping the first write that was overwritten.  This is because the PCI specification permits writes to have side effects.