Editing MOSFET (section)

=== Analog switches ===
{{Unreferenced section|date=September 2016}}

MOSFET analog switches use the MOSFET to pass analog signals when on, and as a high impedance when off. Signals flow in both directions across a MOSFET switch. In this application, the drain and source of a MOSFET exchange places depending on the relative voltages of the source and drain electrodes. The source is the more negative side for an N-MOS or the more positive side for a P-MOS. All of these switches are limited on what signals they can pass or stop by their gate-source, gate-drain and source–drain voltages; exceeding the voltage, current, or power limits will potentially damage the switch. See [[MOSFET#Power MOSFET|Power MOSFET]] subsection down below.

==== Single-type ====
This analog switch uses a four-terminal simple MOSFET of either P or N type.

In the case of an n-type switch, the body is connected to the most negative supply (usually GND) and the gate is used as the switch control. Whenever the gate voltage exceeds the source voltage by at least a threshold voltage, the MOSFET conducts. The higher the voltage, the more the MOSFET can conduct. An N-MOS switch passes all voltages less than ''V''{{sub|gate}} − ''V''{{sub|tn}}. When the switch is conducting, it typically operates in the linear (or ohmic) mode of operation, since the source and drain voltages will typically be nearly equal.

In the case of a P-MOS, the body is connected to the most positive voltage, and the gate is brought to a lower potential to turn the switch on. The P-MOS switch passes all voltages higher than ''V''{{sub|gate}} − ''V''{{sub|tp}} (threshold voltage ''V''{{sub|tp}} is negative in the case of enhancement-mode P-MOS).

==== Dual-type (CMOS) ====
This "complementary" or CMOS type of switch uses one P-MOS and one N-MOS FET to counteract the limitations of the single-type switch. The FETs have their drains and sources connected in parallel, the body of the P-MOS is connected to the high potential (''V''<sub>DD</sub>) and the body of the N-MOS is connected to the low potential (''gnd''). To turn the switch on, the gate of the P-MOS is driven to the low potential and the gate of the N-MOS is driven to the high potential. For voltages between ''V''<sub>DD</sub> − ''V''<sub>tn</sub> and ''gnd'' − ''V''<sub>tp</sub>, both FETs conduct the signal; for voltages less than ''gnd'' − ''V''<sub>tp</sub>, the N-MOS conducts alone; and for voltages greater than ''V''<sub>DD</sub> − ''V''<sub>tn</sub>, the P-MOS conducts alone.

The voltage limits for this switch are the gate-source, gate-drain and source-drain voltage limits for both FETs. Also, the P-MOS is typically two to three times wider than the N-MOS, so the switch will be balanced for speed in the two directions.

[[Three-state logic|Tri-state circuitry]] sometimes incorporates a CMOS MOSFET switch on its output to provide for a low-ohmic, full-range output when on, and a high-ohmic, mid-level signal when off.