Editing Field-programmable gate array (section)

== Applications ==
{{See also|Hardware acceleration}}
An FPGA can be used to solve any problem which is [[computable]]. FPGAs can be used to implement a [[soft microprocessor]], such as the Xilinx [[MicroBlaze]] or Altera [[Nios II]]. But their advantage lies in that they are significantly faster for some applications because of their [[Parallel computing|parallel nature]] and [[Logic optimization|optimality]] in terms of the number of gates used for certain processes.<ref name="Xilinx-Inc-Apr-2006-8-K">{{cite web|url=http://edgar.secdatabase.com/657/110465906027899/filing-main.htm |title=Xilinx Inc, Form 8-K, Current Report, Filing Date Apr 26, 2006 |publisher=secdatabase.com |access-date =May 6, 2018}}</ref>

FPGAs were originally introduced as competitors to [[Complex programmable logic device|CPLDs]] to implement [[glue logic]] for [[printed circuit board]]s. As their size, capabilities, and speed increased, FPGAs took over additional functions to the point where some are now marketed as full [[systems on chip]]s (SoCs). Particularly with the introduction of dedicated [[Binary multiplier|multiplier]]s into FPGA architectures in the late 1990s, applications that had traditionally been the sole reserve of [[digital signal processor]]s (DSPs) began to use FPGAs instead.<ref>{{cite web|url=https://www.bdti.com/articles/info_eet0207fpga.htm|title=Publications and Presentations|work=bdti.com|access-date=2018-11-02|archive-url=https://web.archive.org/web/20100821182813/http://www.bdti.com/articles/info_eet0207fpga.htm|archive-date=2010-08-21|url-status=dead}}</ref><ref>{{cite web|url=https://www.eetimes.com/xilinx-aims-65-nm-fpgas-at-dsp-applications/#|title=Xilinx aims 65-nm FPGAs at DSP applications|work=EETimes|first=Mark|last=LaPedus|date=5 February 2007 }}</ref>

The evolution of FPGAs has motivated an increase in the use of these devices, whose architecture allows the development of hardware solutions optimized for complex tasks, such as 3D MRI image segmentation, 3D discrete wavelet transform, tomographic image reconstruction, or PET/MRI systems.<ref>{{Cite journal |last1=Alcaín |first1=Eduardo |last2=Fernández |first2=Pedro R. |last3=Nieto |first3=Rubén |last4=Montemayor |first4=Antonio S. |last5=Vilas |first5=Jaime |last6=Galiana-Bordera |first6=Adrian |last7=Martinez-Girones |first7=Pedro Miguel |last8=Prieto-de-la-Lastra |first8=Carmen |last9=Rodriguez-Vila |first9=Borja |last10=Bonet |first10=Marina |last11=Rodriguez-Sanchez |first11=Cristina |date=2021-12-15 |title=Hardware Architectures for Real-Time Medical Imaging |journal=Electronics |language=en |volume=10 |issue=24 |pages=3118 |doi=10.3390/electronics10243118 |issn=2079-9292|doi-access=free }}</ref><ref>{{Cite journal |last1=Nagornov |first1=Nikolay N. |last2=Lyakhov |first2=Pavel A. |last3=Valueva |first3=Maria V. |last4=Bergerman |first4=Maxim V. |date=2022 |title=RNS-Based FPGA Accelerators for High-Quality 3D Medical Image Wavelet Processing Using Scaled Filter Coefficients |journal=IEEE Access |volume=10 |pages=19215–19231 |doi=10.1109/ACCESS.2022.3151361 |s2cid=246895876 |issn=2169-3536|doi-access=free |bibcode=2022IEEEA..1019215N }}</ref> The developed solutions can perform intensive computation tasks with parallel processing, are dynamically reprogrammable, and have a low cost, all while meeting the hard real-time requirements associated with medical imaging.

Another trend in the use of FPGAs is [[hardware acceleration]], where one can use the FPGA to accelerate certain parts of an algorithm and share part of the computation between the FPGA and a general-purpose processor. The search engine [[Bing (search engine)|Bing]] is noted for adopting FPGA acceleration for its search algorithm in 2014.<ref name="BingFPGA">{{cite news |last1=Morgan |first1=Timothy Pricket |title=How Microsoft Is Using FPGAs To Speed Up Bing Search |url=https://www.enterprisetech.com/2014/09/03/microsoft-using-fpgas-speed-bing-search/ |access-date=2018-09-18 |publisher=Enterprise Tech |date=2014-09-03 }}{{Dead link|date=April 2025 |bot=InternetArchiveBot |fix-attempted=yes }}</ref> {{as of|2018}}, FPGAs are seeing increased use as [[AI accelerator]]s including Microsoft's Project Catapult<ref name="ProjCatapult">{{cite web|url=https://www.microsoft.com/en-us/research/project/project-catapult/|title=Project Catapult|date=July 2018|website=Microsoft Research}}</ref> and for accelerating [[artificial neural network]]s for [[machine learning]] applications.

Originally,{{When|date=October 2018}} FPGAs were reserved for specific [[vertical application]]s where the volume of production is small. For these low-volume applications, the premium that companies pay in hardware cost per unit for a programmable chip is more affordable than the development resources spent on creating an ASIC. Often a custom-made chip would be cheaper if made in larger quantities, but FPGAs may be chosen to quickly bring a product to market. By 2017, new cost and performance dynamics broadened the range of viable applications.{{cn|date=December 2024}}

Other uses for FPGAs include:

* Space (with [[radiation hardening]]<ref>{{Cite web|url=https://www.militaryaerospace.com/articles/2016/06/radiation-hardened-space-fpga.html|title=FPGA development devices for radiation-hardened space applications introduced by Microsemi|website=www.militaryaerospace.com|access-date=2018-11-02|date=2016-06-03}}</ref>)
* [[Hardware security module]]s<ref name="auto">{{cite web|title=CrypTech: Building Transparency into Cryptography t |url=https://cryptech.is/wp-content/uploads/2016/02/CrypTech_Building_Transparency.pdf |archive-url=https://web.archive.org/web/20160807180252/https://cryptech.is/wp-content/uploads/2016/02/CrypTech_Building_Transparency.pdf |archive-date=2016-08-07 |url-status=live}}</ref>
* High-speed financial transactions<ref>{{Cite web |last=Mann |first=Tobias |date=2023-03-08 |title=While Intel XPUs are delayed, here's some more FPGAs to tide you over |url=https://www.theregister.com/2023/03/08/intel_fpga_agilex/ |website=The Register}}</ref><ref>{{Cite conference |url=https://ieeexplore.ieee.org/document/6044837 |title=High Frequency Trading Acceleration Using FPGAs |last1=Leber |first1=Christian |last2=Geib |first2=Benjamin |last3=Litz |first3=Heiner |doi=10.1109/FPL.2011.64 |publisher=IEEE |date=September 2011 |conference=International Conference on Field Programmable Logic and Applications}}</ref>
* [[Retrocomputing]] (e.g. the MARS and [[MiSTer]] FPGA projects)<ref>{{cite web |url=https://www.retrorgb.com/the-diy-mister-handheld.html |title=The DIY MiSTer Handheld |date=16 December 2024 |access-date=}}</ref>
* Large scale integrated [[digital differential analyzer]]s, a form of an [[analog computer]] based on digital computing elements<ref>[https://people.ece.cornell.edu/land/courses/ece5760/DDA/index.htm DDA on FPGA - A modern Analog Computer]</ref>

=== Usage by United States military ===
FPGAs play a crucial role in modern military communications, especially in systems like the [[Joint Tactical Radio System]] (JTRS) and in devices from companies such as [[Thales Group|Thales]] and [[Harris Corporation]]. Their flexibility and programmability make them ideal for military communications, offering customizable and secure signal processing. In the JTRS, used by the US military, FPGAs provide adaptability and real-time processing, crucial for meeting various communication standards and encryption methods.<ref>{{Cite web |date=2004-12-01 |title=Software-defined radio and JTRS |url=https://www.militaryaerospace.com/computers/article/16710419/softwaredefined-radio-and-jtrs |access-date=2024-01-17 |website=Military Aerospace}}</ref><!--[[User:Kvng/RTH]]-->