Editing Data General Nova (section)

===Processor design===
{| class="infobox" style="font-size:88%;width:30em;"
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|+ Data General Nova registers
|-
|
{| style="font-size:88%;"
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| style="width:10px; text-align:center;"| <sup>1</sup><sub>5</sub>
| style="width:10px; text-align:center;"| <sup>1</sup><sub>4</sub>
| style="width:10px; text-align:center;"| <sup>1</sup><sub>3</sub>
| style="width:10px; text-align:center;"| <sup>1</sup><sub>2</sub>
| style="width:10px; text-align:center;"| <sup>1</sup><sub>1</sub>
| style="width:10px; text-align:center;"| <sup>1</sup><sub>0</sub>
| style="width:10px; text-align:center;"| <sup>0</sup><sub>9</sub>
| style="width:10px; text-align:center;"| <sup>0</sup><sub>8</sub>
| style="width:10px; text-align:center;"| <sup>0</sup><sub>7</sub>
| style="width:10px; text-align:center;"| <sup>0</sup><sub>6</sub>
| style="width:10px; text-align:center;"| <sup>0</sup><sub>5</sub>
| style="width:10px; text-align:center;"| <sup>0</sup><sub>4</sub>
| style="width:10px; text-align:center;"| <sup>0</sup><sub>3</sub>
| style="width:10px; text-align:center;"| <sup>0</sup><sub>2</sub>
| style="width:10px; text-align:center;"| <sup>0</sup><sub>1</sub>
| style="width:10px; text-align:center;"| <sup>0</sup><sub>0</sub>
| style="width:auto;" | ''(bit position)''
|-
|colspan="17" | '''Accumulator registers'''<br>
|- style="background:silver;color:black"
| style="text-align:center;" colspan="16"| 0
| style="background:white; color:black;"| Register 0
|- style="background:silver;color:black"
| style="text-align:center;" colspan="16"| 1
| style="background:white; color:black;"| Register 1
|-
|colspan="17" | '''Index registers'''<br>
|- style="background:silver;color:black"
| style="text-align:center;" colspan="16"| 2
| style="background:white; color:black;"| Index Register 2
|- style="background:silver;color:black"
| style="text-align:center;" colspan="16"| 3
| style="background:white; color:black;"| Index Register 3
|-
|colspan="17" | '''Program counter'''<br>
|- style="background:silver;color:black"
| style="text-align:center; background:white" colspan="1" | &nbsp;
| style="text-align:center;" colspan="15"| PC {{0|&nbsp; &nbsp;}}
| style="background:white; color:black;"| '''P'''rogram '''C'''ounter
|-
|colspan="17" | '''Status register'''
|- style="background:silver;color:black"
| style="text-align:center; background:white" colspan="15" | &nbsp;
| style="text-align:center;"| [[Carry flag|C]]
| style="background:white; color:black" | '''C'''arry flag
|}
|}

The Nova, unlike the [[PDP-8]], was a [[load–store architecture]]. It had four 16-bit [[accumulator (computing)|accumulator]] registers, two of which (2 and 3) could be used as [[index register]]s. There was a 15-bit [[program counter]] and a single-bit [[carry flag|carry]] register. As with the PDP-8, current + [[zero page]] addressing was central. There was no [[stack register]], but later Eclipse designs would utilize a dedicated hardware memory address for this function.

The earliest models of the Nova processed math serially in 4-bit packets, using a single [[74181]] [[bit slicing|bitslice]] [[arithmetic logic unit|ALU]]. A year after its introduction, this design was improved to include a full 16-bit parallel math unit using four 74181s, this design being referred to as the SuperNova. Future versions of the system added a stack unit and hardware multiply/divide.

The Nova 4 / Eclipse S/140 was based on four [[AMD Am2900#Members of the Am2900 family|AMD 2901]] bit-slice ALUs, with [[microcode]] in [[read-only memory]], and was the first Nova designed for [[Dynamic random-access memory|DRAM]] main memory only, without provision for [[magnetic-core memory]].