Editing Pentium Pro (section)

== Bus and multiprocessor capabilities ==
The design of the Pentium Pro bus was influenced by [[Futurebus]], the [[Intel iAPX 432]] bus, and elements of the [[Intel i960]] bus.<ref name="Hard1997">{{cite web |url=https://www.drdobbs.com/back-to-the-futurebus/184410391 |access-date=September 19, 2020 |title=Back to the Futurebus |last=Hardenberg |first=Hal W. |date=June 1, 1997 |website=drdobbs.com |publisher=[[Dr. Dobb's Journal]] |archive-date=January 28, 2021 |archive-url=https://web.archive.org/web/20210128155545/https://www.drdobbs.com/back-to-the-futurebus/184410391 |url-status=live }}</ref> Futurebus was intended to replace the [[VMEbus]] used by the [[Motorola 68000]] from the late 1970s as the main standardized advanced bus, however it remained in stagnation within the standardization committee for many decades.<ref name="Hard1997"/> Intel's iAPX 432 initiative was also a [[commercial failure]], however they did learn how to build a split-transaction bus to support a cacheless multiprocessor system afterwards. The i960 had further developed the split-transaction iAPX 432 bus to include a cache coherency protocol, ending up with a feature set highly reminiscent of Futurebus' ambitions.<ref name="Hard1997"/>

The Pentium Pro used [[GTL+]] signaling in its front-side bus.<ref name="Shanley1998">{{cite book |last=Shanley |first=Tom |date=1998 |title=Pentium Pro and Pentium II System Architecture |url=https://books.google.com/books?id=MLJClvCYh34C&pg=PA199 |publisher=[[Addison-Wesley Professional]] |isbn=978-0-201-30973-7 |page=199}}</ref> The Pentium Pro could be used by itself on up to four-way designs. Eight-way Pentium Pro computers were also built, however these used multiple buses.<ref name="Guruge2000">{{cite book |last=Guruge |first=Anura |date=May 17, 2000 |title=Web-to-Host Connectivity |url=https://books.google.com/books?id=OoVaRlU8Um0C&pg=PA405 |publisher=[[CRC Press]] |isbn=978-0-203-99747-5 |page=405}}</ref> The Pentium Pro was also designed to include the four-way SMP split-transaction cache-coherent bus as a mandatory feature of every chip produced,<ref name="Hard1997"/> which also serves as a way to deny competition access to the socket using cloned processors.<ref name="Hard1997"/>

While the Pentium Pro was not successful as a machine for the masses due to poor 16-bit support for Windows 95 and many other 16-bit and mixed 16/32-bit operating systems (as mentioned above), it did see significant successes in the [[file server]] space due to its advanced, integrated bus design,<ref name="Hard1997"/> introducing many advanced features that had formerly only been available in the pricey workstation segment into the commodity marketplace.