Editing Endianness (section)

=== Middle-endian ===

Numerous other orderings, generically called ''middle-endian'' or ''mixed-endian'', are possible.

The [[PDP-11]] is in principle a 16-bit little-endian system. The instructions to convert between floating-point and integer values in the optional floating-point processor of the PDP-11/45, PDP-11/70, and in some later processors, stored 32-bit "double precision integer long" values with the 16-bit halves swapped from the expected little-endian order. The [[UNIX]] [[C (programming language)|C]] compiler used the same format for 32-bit long integers. This ordering is known as ''PDP-endian''.<ref>{{cite book|url=http://bitsavers.org/pdf/dec/pdp11/handbooks/PDP1145_Handbook_1973.pdf |archive-url=https://ghostarchive.org/archive/20221009/http://bitsavers.org/pdf/dec/pdp11/handbooks/PDP1145_Handbook_1973.pdf |archive-date=2022-10-09 |url-status=live|title=PDP-11/45 Processor Handbook|page=165|year=1973|publisher=[[Digital Equipment Corporation]]}}</ref>

UNIX was one of the first systems to allow the same code to be compiled for platforms with different internal representations. One of the first programs converted was supposed to print out {{code|Unix}}, but on the Series/1 it printed {{code|nUxi}} instead.<ref name=":0">{{cite journal |last1=Jalics|first1=Paul J. |last2=Heines|first2=Thomas S. |title = Transporting a portable operating system: UNIX to an IBM minicomputer |journal=Communications of the ACM|date=1 December 1983|volume=26|issue=12|pages=1066–1072|doi=10.1145/358476.358504|s2cid=15558835 |doi-access=free}}</ref>

A way to interpret this endianness is that it stores a 32-bit integer as two little-endian 16-bit words, with a big-endian word ordering:

{| class="wikitable"
|+ Storage of a 32-bit integer, <kbd>0x0A0B0C0D</kbd>, on a PDP-11
|-
! scope="col" | byte offset
! scope="col" | 8-bit value
! scole="col" | 16-bit little-endian value
|-
! scope="row" | 0
| <kbd>0B<sub>h</sub></kbd>
| rowspan="2" | <kbd>0A0B<sub>h</sub></kbd>
|-
! scope="row" | 1
| <kbd>0A<sub>h</sub></kbd>
|-
! scope="row" | 2
| <kbd>0D<sub>h</sub></kbd>
| rowspan="2" | <kbd>0C0D<sub>h</sub></kbd>
|-
! scope="row" | 3
| <kbd>0C<sub>h</sub></kbd>
|}

[[Segment descriptors]] of [[IA-32]] and compatible processors keep a 32-bit base address of the segment stored in little-endian order, but in four nonconsecutive bytes, at relative positions 2, 3, 4 and 7 of the descriptor start.<ref>{{Cite tech report|title=AMD64 Architecture Programmer's Manual Volume 2: System Programming|page=80|url=http://amd-dev.wpengine.netdna-cdn.com/wordpress/media/2012/10/24593_APM_v21.pdf|year=2013|archiveurl=https://web.archive.org/web/20180218024045/http://amd-dev.wpengine.netdna-cdn.com/wordpress/media/2012/10/24593_APM_v21.pdf|archivedate=2018-02-18}}</ref>