Editing Digital Visual Interface (section)

====Clock and data relationship====
DVI provide one TMDS clock pair and 3 TMDS data pairs in single link mode or 6 TMDS data pairs in dual link mode. TMDS data pairs operate at a [[gross bit rate]] that is 10 times the frequency of the TMDS clock. In each TMDS clock period there is a 10-bit symbol per TMDS data pair representing 8-bits of pixel color. In single link mode each set of three 10-bit symbols represents one 24-bit pixel, while in dual link mode each set of six 10-bit symbols either represents two 24-bit pixels or one pixel of up to 48-bit [[color depth]].

The specification document allows the data and the clock to not be aligned. However, as the ratio between the TMDS clock and gross bit rate per TMDS pair is fixed at 1:10, the unknown alignment is kept over time. The receiver must recover the bits on the stream using any of the techniques of [[clock recovery|clock/data recovery]] to find the correct symbol boundary. The DVI specification allows the TMDS clock to vary between 25&nbsp;MHz and 165&nbsp;MHz. This 1:6.6 ratio can make clock recovery difficult, as [[phase-locked loop]]s, if used, need to work over a large frequency range. One benefit of DVI over other interfaces is that it is relatively straightforward to transform the signal from the digital domain into the analog domain using a video [[Digital-to-analog converter|DAC]], as both clock and synchronization signals are transmitted. Fixed frequency interfaces, like [[DisplayPort]], need to reconstruct the clock from the transmitted data.