Editing PDP-10 (section)

=== Registers ===
{| class="infobox" style="font-size:88%;width:36em;"
|-
|+ DEC PDP-10 registers
|-
|
{| style="font-size:88%;"
|- 
| style="width:10px; text-align:center;"| <sup>0</sup><sub>0</sub>
| style="width:120px; text-align:center;"| . . .
| style="width:10px; text-align:center;"| <sup>1</sup><sub>7</sub>
| style="width:10px; text-align:center;"| <sup>1</sup><sub>8</sub>
| style="width:120px; text-align:center;"| . . .
| style="width:10px; text-align:center;"| <sup>3</sup><sub>5</sub>
| style="width:auto; background:white; color:black" | ''(bit position)''
|- 
|colspan="7" | '''General registers'''
|- style="background:silver;color:black"
| style="text-align:center" colspan="6"| <div style="display:inline-block; width:12px">&nbsp;</div> AC0
| style="background:white; color:black;"| '''R'''egister 0
|- style="background:silver;color:black"
| style="text-align:right" colspan="3"| &nbsp;
| style="text-align:left;" colspan="3"| AC1
| style="background:white; color:black;"| '''R'''egister 1
|- style="background:silver;color:black"
| style="text-align:right" colspan="3"| &nbsp;
| style="text-align:left;" colspan="3"| AC2
| style="background:white; color:black;"| '''R'''egister 2
|- style="background:silver;color:black"
| style="text-align:right" colspan="3"| &nbsp;
| style="text-align:left;" colspan="3"| AC3
| style="background:white; color:black;"| '''R'''egister 3
|- style="background:silver;color:black"
| style="text-align:right" colspan="3"| &nbsp;
| style="text-align:left;" colspan="3"| AC4
| style="background:white; color:black;"| '''R'''egister 4
|- style="background:silver;color:black"
| style="text-align:right" colspan="3"| &nbsp;
| style="text-align:left;" colspan="3"| AC5
| style="background:white; color:black;"| '''R'''egister 5
|- style="background:silver;color:black"
| style="text-align:right" colspan="3"| &nbsp;
| style="text-align:left;" colspan="3"| AC6
| style="background:white; color:black;"| '''R'''egister 6
|- style="background:silver;color:black"
| style="text-align:right" colspan="3"| &nbsp;
| style="text-align:left;" colspan="3"| AC7
| style="background:white; color:black;"| '''R'''egister 7
|- style="background:silver;color:black"
| style="text-align:right" colspan="3"| &nbsp;
| style="text-align:left;" colspan="3"| AC10
| style="background:white; color:black;"| '''R'''egister 8
|- style="background:silver;color:black"
| style="text-align:right" colspan="3"| &nbsp;
| style="text-align:left;" colspan="3"| AC11
| style="background:white; color:black;"| '''R'''egister 9
|- style="background:silver;color:black"
| style="text-align:right" colspan="3"| &nbsp;
| style="text-align:left;" colspan="3"| AC12
| style="background:white; color:black;"| '''R'''egister 10
|- style="background:silver;color:black"
| style="text-align:right" colspan="3"| &nbsp;
| style="text-align:left;" colspan="3"| AC13
| style="background:white; color:black;"| '''R'''egister 11
|- style="background:silver;color:black"
| style="text-align:right" colspan="3"| &nbsp;
| style="text-align:left;" colspan="3"| AC14
| style="background:white; color:black;"| '''R'''egister 12
|- style="background:silver;color:black"
| style="text-align:right" colspan="3"| &nbsp;
| style="text-align:left;" colspan="3"| AC15
| style="background:white; color:black;"| '''R'''egister 13
|- style="background:silver;color:black"
| style="text-align:right" colspan="3"| &nbsp;
| style="text-align:left;" colspan="3"| AC16
| style="background:white; color:black;"| '''R'''egister 14
|- style="background:silver;color:black"
| style="text-align:right" colspan="3"| &nbsp;
| style="text-align:left;" colspan="3"| AC17
| style="background:white; color:black;"| '''R'''egister 15
|- 
|colspan="7" | '''Program counter and status flags'''
|- style="background:silver;color:black"
| style="text-align:left;" colspan="2"| Program Flags
| style="text-align:right;"| '''00000'''
| style="text-align:center" colspan="3"| PC
| style="background:white; color:black;"| '''P'''rogram '''C'''ounter
|} 
Note that the bit numbering order is different from some other DEC processors, and many newer processors.
|}

There are 16 general-purpose, 36-bit registers.  The right half of these registers (other than register 0) may be used for indexing. A few instructions operate on pairs of registers. The "PC Word" register is split in half; the right 18 bits contains the [[program counter]] and the left 13 bits contains the [[status register|processor status flag]]s, with five zeros between the two sections. The condition register bits, which record the results of arithmetic operations (''e.g.'' overflow), can be accessed by only a few instructions.

In the original KA-10 systems, these registers are simply the first 16 words of [[main memory]]. The "fast registers" hardware option implements them as registers in the CPU, still addressable as the first 16 words of memory. Some software takes advantage of this by using the registers as an [[CPU cache|instruction cache]] by loading code into the registers and then jumping to the appropriate address; this is used, for example, in [[Maclisp]] to implement one version of the [[Garbage collection (computer science)|garbage collector]].<ref>{{cite web |url=http://www.paulgraham.com/thist.html|title=History of T|first=Olin|last=Shivers|access-date=October 25, 2019|quote=Maclisp on the -10 had used a mark&sweep GC (one version of which famously "ran in the register set," though that is another story)}}</ref> Later models all have registers in the CPU.