Editing Intel MCS-51 (section)

== Registers ==
The only register on an 8051 that is not memory-mapped is the 16-bit program counter (PC).  This specifies the address of the next instruction to execute.  Relative branch instructions supply an 8-bit signed offset which is added to the PC.

Eight general-purpose registers R0–R7 may be accessed with instructions one byte shorter than others.  They are mapped to IRAM between 0x00 and 0x1F.  Only eight bytes of that range are used at any given time, determined by the two bank-select bits in the PSW.

The following is a partial list of the 8051's registers, which are memory-mapped into the special function register space:

; Stack pointer, SP (0x81):  This is an 8-bit register used by subroutine call and return instructions.  The stack grows upward; the SP is incremented before pushing and decremented after popping a value.
; Data pointer, DP (0x82–83):  This is a 16-bit register that is used for accessing PMEM and XRAM.
; Program status word, PSW (0xD0):  This contains important status flags, by bit number: {{ordered list
 | start=0
 | Parity, P.  Gives the parity ([[XOR]] of the bits) of the accumulator, A.
 | User defined, UD.  May be read and written by software; not otherwise affected by hardware.
 | [[Overflow flag]], OV.  Set when addition produces a signed overflow.
 | Register select 0, RS0.  The low-order bit of the register bank.  Set when banks at 0x08 or 0x18 are in use.
 | Register select 1, RS1.  The high-order bit of the register bank.  Set when banks at 0x10 or 0x18 are in use.
 | Flag 0, F0.  May be read and written by software; not otherwise affected by hardware.
 | [[Adjust flag|Auxiliary carry]], AC.  Set when addition produces a carry from bit 3 to bit 4.
 | [[Carry bit]], C. Often used as the general register for bit computations, or the "Boolean accumulator".
 }}
; Accumulator, A (0xE0):  This register is used by most instructions.
; B register (0xF0):  This is used as an extension to the accumulator for multiply and divide instructions.

256 single bits are directly addressable.  These are the 16 IRAM locations from 0x20–0x2F, and the 16 special function registers 0x80, 0x88, 0x90, ..., 0xF8.  Any bit of these bytes may be directly accessed by a variety of logical operations and conditional branches.

Note that the PSW does not contain the common [[Negative flag|negative (N)]], or [[Zero flag|zero (Z) flags]]. For the former, the most significant bit of the accumulator can be addressed directly, as it is a bit-addressable SFR. For the latter, there are explicit instructions to jump on whether or not the accumulator is zero. There is also a two-operand compare and jump operation.

The parity (P) bit is often used to implement serial modes that include parity. To support this, the standard MCS51 [[UART]]s could send 9 bits.