Editing AVR microcontrollers (section)

=== Instruction set ===
{{Main|Atmel AVR instruction set}}
The [[Atmel AVR instruction set|AVR instruction set]] is more [[Orthogonal instruction set|orthogonal]] than those of most eight-bit microcontrollers, in particular the [[Intel 8051|8051 clones]] and [[PIC microcontroller]]s with which AVR has competed. However, it is not completely regular:

* [[Pointer register]]s X, Y, and Z have addressing capabilities that are different from each other.
* [[Processor register|Register]] locations R0 to R15 have more limited addressing capabilities than register locations R16 to R31.
* I/O ports 0 to 31 can be bit addressed, unlike I/O ports 32 to 63.
* CLR (clear all bits to zero) affects flags, while SER (set all bits to one) does not, even though they are complementary instructions. (CLR is pseudo-op for EOR R, R; while SER is short for LDI R,$FF. Arithmetic operations such as EOR modify flags, while moves/loads/stores/branches such as LDI do not.)
* Accessing read-only data stored in the program memory (flash) requires special LPM instructions; the flash bus is otherwise reserved for instruction memory.

Some chip-specific differences affect code generation. Code pointers (including return addresses on the stack) are two bytes long on chips with up to 128&nbsp;KB of flash memory, but three bytes long on larger chips; not all chips have hardware multipliers; chips with over 8&nbsp;KB of flash have branch and call instructions with longer ranges; and so forth.

The mostly regular instruction set makes C (and even Ada) compilers fairly straightforward and efficient. [[GNU Compiler Collection|GCC]] has included AVR support for quite some time, and that support is widely used. [[LLVM]] also has rudimentary AVR support. In fact, Atmel solicited input from major developers of compilers for small microcontrollers, to determine the instruction set features that were most useful in a compiler for high-level languages.<ref name="codesign" />