Editing Intel MCS-51 (section)

=== External data memory ===
External data memory (XRAM) is a third address space, also starting at address 0, and allowing 16 bits of address space. It can also be on- or off-chip; what makes it "external" is that it must be accessed using the {{code|lang=asm|MOVX}} (move external) instruction. Many variants of the 8051 include the standard 256&nbsp;bytes of IRAM plus a few kilobytes of XRAM on the chip.

The first 256 bytes of XRAM may be accessed using the {{code|lang=asm|MOVX A,@R0}}, {{code|lang=asm|MOVX A,@R1}}, {{code|lang=asm|MOVX @R0,A}}, and {{code|lang=asm|MOVX @R1,A}} instructions. The full 64&nbsp;KB may be accessed using {{code|lang=asm|MOVX A,@DPTR}} and {{code|lang=asm|MOVX @DPTR,A}}. The 16-bit address requires the programmer to load the 16-bit index register. For this reason, RAM accesses with 16-bit addresses are substantially slower.

Some CPUs<ref name="teridian">{{cite web |title=Silergy 71M6513 Data sheet |url=https://www.silergy.com/download/upload/pdffile/71M6513_DS_Rev4.pdf/2673 |website=Silergy electricity metering ICs |publisher=Silergy Corp. |access-date=17 May 2021}}</ref> permit the 8-bit indirect address to use any 8-bit general-purpose register.

To permit the use of this feature, some 8051-compatible microcontrollers with internal RAM larger than 256 bytes, or an inability to access external RAM,<ref name="teridian"/> access internal RAM as if it were external and have a special function register (e.g. PDATA) that permits them to set the upper address of the 256-byte page. This emulates the MCS8051 mode that can page the upper byte of a RAM address by setting the general-purpose I/O pins.

When RAM larger than 64&nbsp;KB is required, a common system makes the RAM bank-switched, with general-purpose I/O selecting the upper address bits. Some 8051 compilers<ref name="keil"/> make provisions to automatically access paged data.