Editing CMOS (section)

=== Dynamic dissipation ===

==== Charging and discharging of load capacitances ====
CMOS circuits dissipate power by charging the various load capacitances (mostly gate and wire capacitance, but also drain and some source capacitances) whenever they are switched. In one complete cycle of CMOS logic, current flows from V<sub>DD</sub> to the load capacitance to charge it and then flows from the charged load capacitance (C<sub>L</sub>) to ground during discharge. Therefore, in one complete charge/discharge cycle, a total of Q=C<sub>L</sub>V<sub>DD</sub> is thus transferred from V<sub>DD</sub> to ground. Multiply by the switching frequency on the load capacitances to get the current used, and multiply by the average voltage again to get the characteristic switching power dissipated by a CMOS device: <math> P = 0.5 C V^2 f </math>.

Since most gates do not operate/switch at every [[Clock signal|clock cycle]], they are often accompanied by a factor <math>\alpha</math>, called the activity factor. Now, the dynamic power dissipation may be re-written as <math> P = \alpha C V^2 f </math>.

A clock in a system has an activity factor α=1, since it rises and falls every cycle. Most data has an activity factor of 0.1.<ref>{{cite journal |first1=Konstantin |last1=Moiseev |first2=Avinoam |last2=Kolodny |first3=Shmuel |last3=Wimer |title=Timing-aware power-optimal ordering of signals |journal=ACM Trans. Des. Autom. Electron. Syst. |volume=13 |issue=4 |at=Article 65 |date=September 2008 |doi=10.1145/1391962.1391973 |citeseerx=10.1.1.222.9211|s2cid=18895687 }}</ref> If correct load capacitance is estimated on a node together with its activity factor, the dynamic power dissipation at that node can be calculated effectively.

==== Short-circuit power ====
Since there is a finite rise/fall time for both pMOS and nMOS, during transition, for example, from off to on, both the transistors will be on for a small period of time in which current will find a path directly from V<sub>DD</sub> to ground, hence creating a [[short-circuit current]], sometimes called a ''crowbar'' current. Short-circuit power dissipation increases with the rise and fall time of the transistors.

This form of power consumption became significant in the 1990s as wires on chip became narrower and the long wires became more resistive. CMOS gates at the end of those resistive wires see slow input transitions. Careful design which avoids weakly driven long skinny wires reduces this effect, but crowbar power can be a substantial part of dynamic CMOS power.