Editing Synchronous dynamic random-access memory (section)

== History ==
[[Image:SDR SDRAM-1.jpg|thumb|Eight [[Hyundai Electronics|Hyundai]] SDRAM ICs on a PC100 [[DIMM]] package]]

The earliest DRAMs were often synchronized with the CPU clock (clocked) and were used with early microprocessors. In the mid-1970s, DRAMs moved to the asynchronous design, but in the 1990s returned to synchronous operation.<ref>{{cite book | author=P. Darche | title=Microprocessor: Prolegomenes - Calculation and Storage Functions - Calculation Models and Computer | year=2020 | page=59 | publisher=John Wiley & Sons | isbn=9781786305633 | url=https://books.google.com/books?id=rLC9zQEACAAJ}}</ref><ref>{{cite book |author1=B. Jacob |author2=S. W. Ng |author3=D. T. Wang | title=Memory Systems: Cache, DRAM, Disk | year=2008 | publisher=Morgan Kaufmann | page=324 | isbn=9780080553849 | url=https://books.google.com/books?id=SrP3aWed-esC}}</ref>

In the late 1980s [[IBM]] invented DDR SDRAM, they built a [[Double data rate|dual-edge clocking]] RAM and presented their results at the International Solid-State Circuits Convention in 1990.<ref>{{cite book |last1=Jacob |first1=B. |url=https://books.google.com/books?id=SrP3aWed-esC |title=Memory Systems: Cache, DRAM, Disk |last2=Ng |first2=S. W. |last3=Wang |first3=D. T. |publisher=Morgan Kaufmann |year=2008 |isbn=9780080553849 |page=333}}</ref><ref>{{cite journal |last1=Kalter |first1=H. L. |last2=Stapper |first2=C. H. |last3=Barth |first3=J. E. |last4=Dilorenzo |first4=J. |last5=Drake |first5=C. E. |last6=Fifield |first6=J. A. |last7=Kelley |first7=G. A. |last8=Lewis |first8=S. C. |last9=van der Hoeven |first9=W. B. |last10=Jankosky |first10=J. A. |year=1990 |title=A 50-ns 16-Mb DRAM with a 10-ns data rate and on-chip ECC |journal=IEEE Journal of Solid-State Circuits |volume=25 |issue=5 |page=1118 |bibcode=1990IJSSC..25.1118K |doi=10.1109/4.62132}}</ref> In 1998, [[Samsung]] released a [[double data rate]] SDRAM, known as [[DDR SDRAM]], chip (64{{nbsp}}[[Megabit|Mbit]]) followed soon after by [[Hyundai Electronics]] (now [[SK Hynix]]) the same year and mass-produced in 1993.<ref name="electronic-design">{{cite journal |date=1993 |title=Electronic Design |url=https://books.google.com/books?id=QmpJAQAAIAAJ |journal=[[Electronic Design]] |publisher=Hayden Publishing Company |volume=41 |issue=15–21 |quote=The first commercial synchronous DRAM, the Samsung 16-Mbit KM48SL2000, employs a single-bank architecture that lets system designers easily transition from asynchronous to synchronous systems.}}</ref> By 2000, SDRAM had replaced virtually all other types of [[DRAM]] in modern computers, because of its greater performance.

SDRAM latency is not inherently lower (faster access times) than asynchronous DRAM. Indeed, early SDRAM was somewhat slower than contemporaneous [[burst EDO DRAM]] due to the additional logic. The benefits of SDRAM's internal buffering come from its ability to interleave operations to multiple banks of memory, thereby increasing effective [[Bandwidth (computing)|bandwidth]].

Today, virtually all SDRAM is manufactured in compliance with standards established by [[JEDEC]], an electronics industry association that adopts [[open standards]] to facilitate interoperability of electronic components. JEDEC formally adopted its first SDRAM standard in 1993 and subsequently adopted other SDRAM standards, including those for [[DDR SDRAM|DDR]], [[DDR2 SDRAM|DDR2]] and [[DDR3 SDRAM]].

SDRAM is also available in [[Registered memory|registered]] varieties, for systems that require greater scalability such as [[Server (computing)|server]]s and [[workstations]].

Today, the world's largest manufacturers of SDRAM include [[Samsung Electronics]], [[SK Hynix]], [[Micron Technology]], and [[Nanya Technology]].