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== Hardware implementation == In a simple [[central processing unit]] (CPU), the PC is a [[counter (digital)|digital counter]] (which is the origin of the term "program counter") that may be one of several hardware [[Processor register|registers]]. The [[instruction cycle]]<ref name="Hennessy_1990" /> begins with a ''fetch'', in which the CPU places the value of the PC on the [[address bus]] to send it to the memory. The memory responds by sending the contents of that memory location on the [[Bus (computing)|data bus]]. (This is the [[stored-program computer]] model, in which a single memory space contains both executable instructions and ordinary data.<ref name="Randall_1982" />) Following the fetch, the CPU proceeds to ''execution'', taking some action based on the memory contents that it obtained. At some point in this cycle, the PC will be modified so that the next instruction executed is a different one (typically, incremented so that the next instruction is the one starting at the memory address immediately following the last memory location of the current instruction). Like other processor registers, the PC may be a bank of binary latches, each one representing one bit of the value of the PC.<ref name="Bell_1971" /> The number of bits (the width of the PC) relates to the processor architecture. For instance, a β32-bitβ CPU may use 32 bits to be able to address 2<sup>32</sup> units of memory. On some processors, the width of the program counter instead depends on the addressable memory; for example, some [[AVR microcontrollers]] have a PC which wraps around after 12 bits.<ref name="Arnold_2020_AS" /> If the PC is a binary counter, it may increment when a pulse is applied to its COUNT UP input, or the CPU may compute some other value and load it into the PC by a pulse to its LOAD input.<ref name="Walker_1967" /> To identify the current instruction, the PC may be combined with other registers that identify a [[segmentation (memory)|segment]] or [[page (computer memory)|page]]. This approach permits a PC with fewer bits by assuming that most memory units of interest are within the current vicinity.
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