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== Overview == [[File:KL Intel Pentium 4 Northwood.jpg|thumb|A 3 GHz model of the Intel Pentium 4 processor that incorporates Hyper-Threading Technology<ref name="Intel2">{{cite web|url=http://processorfinder.intel.com/Details.aspx?sSpec=sl6wk|title=Intel Processor Spec Finder: SL6WK}}</ref>]] Hyper-Threading Technology is a form of simultaneous [[Multithreading (computer architecture)|multithreading]] technology introduced by Intel, while the concept behind the technology has been patented by [[Sun Microsystems]]. Architecturally, a processor with Hyper-Threading Technology consists of two logical processors per core, each of which has its own processor architectural state. Each logical processor can be individually halted, interrupted or directed to execute a specified thread, independently from the other logical processor sharing the same physical core.<ref name="sc.tamu.edu">{{cite web |url = http://sc.tamu.edu/systems/eos/nehalem.pdf |title = The Architecture of the Nehalem Processor and Nehalem-EP SMP Platforms |date = 2011-03-17 |access-date = 2014-03-21 |first = Michael E. |last=Thomadakis |publisher = Texas A&M University |page = 23 |url-status = dead |archive-url = https://web.archive.org/web/20140811023120/http://sc.tamu.edu/systems/eos/nehalem.pdf |archive-date = 11 August 2014}}</ref> Unlike a traditional dual-processor configuration that uses two separate physical processors, the logical processors in a hyper-threaded core share the execution resources. These resources include the execution engine, caches, and system bus interface; the sharing of resources allows two logical processors to work with each other more efficiently, and allows a logical processor to borrow resources from a stalled logical core (assuming both logical cores are associated with the same physical core). A processor stalls when it must wait for data it has requested, in order to finish processing the present thread. The degree of benefit seen when using a hyper-threaded, or multi-core, processor depends on the needs of the software, and how well it and the operating system are written to manage the processor efficiently.<ref name="sc.tamu.edu" /> Hyper-threading works by duplicating certain sections of the processor—those that store the [[architectural state]]—but not duplicating the main [[Execution unit|execution resources]]. This allows a hyper-threading processor to appear as the usual "physical" processor plus an extra "[[Virtualization|logical]]" processor to the host operating system (HTT-unaware operating systems see two "physical" processors), allowing the operating system to schedule two threads or processes simultaneously and appropriately. When execution resources in a hyper-threaded processor are not in use by the current task, and especially when the processor is stalled, those execution resources can be used to execute another scheduled task. (The processor may stall due to a [[CPU cache#Cache miss|cache miss]], [[branch misprediction]], or [[data dependency]].)<ref>{{Cite book |title=Computer Architecture: A Quantitative Approach |last1=Hennessy | first1=John L. |last2=Patterson |first2=David A. |others=[[Asanović, Krste]], Bakos, Jason D., Colwell, Robert P., Bhattacharjee, Abhishek, 1984-, Conte, Thomas M., 1964-|date=7 December 2017 |isbn=978-0128119051|edition= Sixth|location=Cambridge, MA|oclc=983459758}}</ref> This technology is transparent to operating systems and programs. The minimum that is required to take advantage of hyper-threading is [[symmetric multiprocessing]] (SMP) support in the operating system, since the logical processors appear no different to the operating system than physical processors. It is possible to optimize operating system behavior on multi-processor, hyper-threading capable systems. For example, consider an SMP system with two physical processors that are both hyper-threaded (for a total of four logical processors). If the operating system's thread [[Scheduling (computing)|scheduler]] is unaware of hyper-threading, it will treat all four logical processors the same. If only two threads are eligible to run, it might choose to schedule those threads on the two logical processors that happen to belong to the same physical processor. That processor would be extremely busy, and would share execution resources, while the other processor would remain idle, leading to poorer performance than if the threads were scheduled on different physical processors. This problem can be avoided by improving the scheduler to treat logical processors differently from physical processors, which is, in a sense, a limited form of the scheduler changes required for [[Non-Uniform Memory Access|NUMA]] systems.
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