Editing Floating-point unit (section)

== History ==

In 1954, the [[IBM 704]] had floating-point arithmetic as a standard feature, one of its major improvements over its predecessor the [[IBM 701]]. This was carried forward to its successors the 709, 7090, and 7094.

In 1963, Digital announced the [[PDP-6]], which had floating point as a standard feature.<ref>{{cite web |title=PDP-6 Handbook|url=http://bitsavers.org/pdf/dec/pdp6/F-65_PDP-6_Handbook_Aug64.pdf |archive-url=https://ghostarchive.org/archive/20221009/http://bitsavers.org/pdf/dec/pdp6/F-65_PDP-6_Handbook_Aug64.pdf |archive-date=2022-10-09 |url-status=live|website=www.bitsavers.org}}</ref>

In 1963, the [[GE-200 series|GE-235]] featured an "Auxiliary Arithmetic Unit" for floating point and double-precision calculations.<ref>{{cite web |title=GE-2xx documents |url=http://www.bitsavers.org/pdf/ge/GE-2xx/ |website=www.bitsavers.org|at=[http://www.bitsavers.org/pdf/ge/GE-2xx/CPB-267_GE-235-SystemManual_1963.pdf CPB-267_GE-235-SystemManual_1963.pdf], p. IV-4}}</ref>

Historically, some systems implemented [[Floating-point arithmetic|floating point]] with a [[coprocessor]] rather than as an integrated unit (but now in addition to the CPU, e.g. [[graphics processing unit|GPUs]]{{snd}}that are coprocessors not always built into the CPU{{snd}}have FPUs as a rule, while first generations of GPUs did not). This could be a single [[integrated circuit]], an entire [[Printed circuit board|circuit board]] or a cabinet. Where floating-point calculation hardware has not been provided, floating-point calculations are done in software, which takes more processor time, but avoids the cost of the extra hardware. For a particular computer architecture, the floating-point unit instructions may be [[Emulator|emulated]] by a library of software functions; this may permit the same [[object code]] to run on systems with or without floating-point hardware. Emulation can be implemented on any of several levels: in the CPU as [[microcode]], as an [[operating system]] function, or in [[user-space]] code. When only integer functionality is available, the [[CORDIC]] methods are most commonly used for [[transcendental function]] evaluation.{{Citation needed|reason=When a fast integer multiply is available, this can be surprising.|date=November 2023}}

In most modern computer architectures, there is some division of floating-point operations from [[integer]] operations. This division varies significantly by architecture; some have dedicated floating-point registers, while some, like [[x86|Intel x86]], go as far as independent [[computer clock|clocking]] schemes.<ref>{{Cite web |url=http://www.cpu-world.com/CPUs/80287/index.html |title=Intel 80287 family |website=www.cpu-world.com |access-date=2019-01-15}}</ref>

CORDIC routines have been implemented in [[x87|Intel x87]] coprocessors ([[Intel 8087|8087]],<ref name="Muller_2006">{{cite book |author-last=Muller |author-first=Jean-Michel |url=http://perso.ens-lyon.fr/jean-michel.muller/SecondEdition.html |title=Elementary Functions: Algorithms and Implementation |date=2006 |publisher=[[Birkhäuser]] |isbn=978-0-8176-4372-0 |edition=2nd |location=Boston, Massachusetts |page=134 |language=en-us |lccn=2005048094 |access-date=2015-12-01}}</ref><ref name="Nave_1983">{{cite journal |author-first=Rafi |author-last=Nave |title=Implementation of Transcendental Functions on a Numerics Processor |journal=Microprocessing and Microprogramming |volume=11 |issue=3–4 |pages=221–225 |date=March<!-- /April--> 1983|doi=10.1016/0165-6074(83)90151-5 }}</ref><ref name="Palmer_1984">{{cite book |author-last1=Palmer |author-first1=John F. |url=https://archive.org/details/8087primer00palm |title=The 8087 Primer |author-last2=Morse |author-first2=Stephen Paul |date=1984 |publisher=[[John Wiley & Sons Australia, Limited]] |isbn=0471875694 |edition=1st |language=en-us |id=9780471875697 |author-link2=Stephen Paul Morse |access-date=2016-01-02 |url-access=registration}}</ref><ref name="Glass_1990">{{cite journal |title=Math Coprocessors: A look at what they do, and how they do it |author-first=L. Brent |author-last=Glass |journal=[[Byte (magazine)|Byte]] |volume=15 |issue=1 |date=January 1990 |pages=337–348 |issn=0360-5280}}</ref><ref name="Jarvis_1990">{{cite journal |date=1990-10-01 |title=Implementing CORDIC algorithms – A single compact routine for computing transcendental functions |url=http://www.drdobbs.com/database/implementing-cordic-algorithms/184408428 |journal=[[Dr. Dobb's Journal]] |pages=152–156 |access-date=2016-01-02 |author-first=Pitts |author-last=Jarvis}}</ref> 80287,<ref name="Jarvis_1990"/><ref name="Yuen_1988">{{cite journal |title=Intel's Floating-Point Processors |author-first=A. K. |author-last=Yuen |journal=Electro/88 Conference Record |pages=48/5/1–7 |date=1988}}</ref> 80387<ref name="Jarvis_1990"/><ref name="Yuen_1988"/>) up to the [[Intel 80486|80486]]<ref name="Muller_2006"/> microprocessor series, as well as in the [[Motorola 68881]]<ref name="Muller_2006"/><ref name="Nave_1983"/> and 68882 for some kinds of floating-point instructions, mainly as a way to reduce the [[Logic gate|gate]] counts (and complexity) of the FPU subsystem.

Floating-point operations are often [[instruction pipelining|pipelined]]. In earlier [[superscalar]] architectures without general [[out-of-order execution]], floating-point operations were sometimes pipelined separately from integer operations.

The modular architecture of [[Bulldozer (microarchitecture)|Bulldozer microarchitecture]] uses a special FPU named FlexFPU, which uses [[simultaneous multithreading]]. Each physical integer core, two per module, is single-threaded, in contrast with Intel's [[Hyperthreading]], where two virtual simultaneous threads share the resources of a single physical core.<ref>{{cite web |url=http://cdn3.wccftech.com/wp-content/uploads/2013/07/AMD-Steamroller-vs-Bulldozer.jpg |title=AMD Steamroller vs Bulldozer |website=WCCFtech |access-date=14 March 2022 |archive-url=https://web.archive.org/web/20150509204809/http://cdn3.wccftech.com/wp-content/uploads/2013/07/AMD-Steamroller-vs-Bulldozer.jpg |archive-date=9 May 2015 |url-status=dead}}</ref><ref>{{cite web |url=https://www.bit-tech.net/news/hardware/2010/10/28/amd-unveils-flex-fp/1 |date=28 October 2010 |first1=Gareth |last1=Halfacree |title=AMD unveils Flex FP |website=bit-tech.net |access-date=29 March 2018 |url-status=unfit |archive-url=https://web.archive.org/web/20170322014910/https://www.bit-tech.net/news/hardware/2010/10/28/amd-unveils-flex-fp/1 |archive-date= Mar 22, 2017 }}</ref>