Editing Darlington transistor (section)

== Behavior ==
[[File:Darlington transistor MJ1000.jpg|thumbnail|View of the chip in an MJ1000]]

A Darlington pair behaves like a single transistor, meaning it has one base, collector, and emitter. It typically creates a high current gain (approximately the product of the gains of the two transistors, because their β values multiply together). A general relation between the compound current gain and the individual gains is given by:

:<math>\beta_\mathrm{Darlington} = \beta_1 \cdot \beta_2 + \beta_1 + \beta_2</math>

If ''β<sub>1</sub>'' and ''β<sub>2</sub>'' are high enough (hundreds), this relation can be approximated with:

:<math>\beta_\mathrm{Darlington} \approx \beta_1 \cdot \beta_2</math>
[[File:TIP122.jpg|thumb|TIP122 Silicon Die]]
A typical Darlington transistor has a current gain of 1000 or more, so that only a small base current is needed to make the pair switch on much higher switched currents.<ref name="Boylestad">{{cite book |title=Electronic devices and circuit theory |edition=11 |publisher=Pearson Education, Inc. |pages=305–314 |first1=Robert L. |last1=Boylestad |first2=Louis |last2=Nashelsky |year=2013 |isbn=978-0-13-262226-4 }}</ref> Another advantage involves providing a very high input impedance for the circuit which also translates into an equal decrease in output impedance. The ease of creating this circuit also provides an advantage. It can be simply made with two separate NPN (or PNP) transistors, and is also available in a variety of single packages.

One drawback is an approximate doubling of the base–emitter voltage. Since there are two junctions between the base and emitter of the Darlington transistor, the equivalent base–emitter voltage is the sum of both base–emitter voltages:

:<math>V_{BE} = V_{BE1} + V_{BE2} \approx 2V_{BE1}\!</math>

For silicon-based technology, where each V<sub>BEi</sub> is about 0.65 V when the device is operating in the active or saturated region, the necessary base–emitter voltage of the pair is 1.3 V.

Another drawback of the Darlington pair is its increased "saturation" voltage. The output transistor is not allowed to saturate (i.e. its base–collector junction must remain reverse-biased) because the first transistor, when saturated, establishes full (100%) parallel negative feedback between the collector and the base of the second transistor.<ref>Similarly, an [[emitter follower]] never saturates because of the 100% series negative feedback. Another example is an "active diode" made by a transistor with joined base and collector (e.g., the current-setting part of a [[current mirror]]).</ref> Since collector–emitter voltage is equal to the sum of its own base–emitter voltage and the collector-emitter voltage of the first transistor, both positive quantities in normal operation, it always exceeds the base-emitter voltage. (In symbols, <math>\mathrm{V_{CE2} = V_{CE1} + V_{BE2} > V_{BE2}} \Rightarrow \mathrm{V_{C2} > V_{B2}}</math> always.) Thus the "saturation" voltage of a Darlington transistor is one V<sub>BE</sub> (about 0.65 V in silicon) higher than a single transistor saturation voltage, which is typically 0.1 - 0.2 V in silicon. For equal collector currents, this drawback translates to an increase in the dissipated power for the Darlington transistor over a single transistor. The increased low output level can cause troubles when TTL logic circuits are driven.

Another problem is a reduction in switching speed or response, because the first transistor cannot actively inhibit the base current of the second one, making the device slow to switch off. To alleviate this, the second transistor often has a resistor of a few hundred ohms connected between its base and emitter terminals.<ref name=TAoE/> This resistor provides a low-impedance discharge path for the charge accumulated on the base-emitter junction, allowing a faster transistor turn-off.

The Darlington pair has more phase shift at high frequencies than a single transistor and hence can more easily become unstable with [[negative feedback]] (i.e., systems that use this configuration can have poor performance due to the extra transistor delay).