Jump to content
Main menu
Main menu
move to sidebar
hide
Navigation
Main page
Recent changes
Random page
Help about MediaWiki
Special pages
Niidae Wiki
Search
Search
Appearance
Create account
Log in
Personal tools
Create account
Log in
Pages for logged out editors
learn more
Contributions
Talk
Editing
Computer memory
(section)
Page
Discussion
English
Read
Edit
View history
Tools
Tools
move to sidebar
hide
Actions
Read
Edit
View history
General
What links here
Related changes
Page information
Appearance
move to sidebar
hide
Warning:
You are not logged in. Your IP address will be publicly visible if you make any edits. If you
log in
or
create an account
, your edits will be attributed to your username, along with other benefits.
Anti-spam check. Do
not
fill this in!
== History == [[File:Historical cost of computer memory and storage.svg|thumb|Historical lowest retail price of computer memory and [[computer storage|storage]] ]] [[File:Memoria elettromeccanica per il calcolatore IBM 602A - Museo scienza tecnologia Milano D1191.jpg|thumb|Electromechanical memory used in the [[IBM 602]], an early punch multiplying calculator]] [[File:ENIAC Penn2.jpg|thumb|Detail of the back of a section of [[ENIAC]], showing [[vacuum tubes]] ]] [[File:James Pomerene IAS machine.jpg|thumb|upright| [[Williams tube]] used as memory in the [[IAS computer]] {{circa|1951}}]] [[File:8 bytes vs. 8Gbytes.jpg|thumb|8{{nbsp}}[[Gibibyte|GB]] [[microSDHC]] card on top of 8{{nbsp}}[[bytes]] of [[magnetic-core memory]] (1{{nbsp}}core is 1{{nbsp}}[[bit]].)]] In the early 1940s, memory technology often permitted a capacity of a few bytes. The first electronic programmable [[digital computer]], the [[ENIAC]], using thousands of [[vacuum tube]]s, could perform simple calculations involving 20 numbers of ten decimal digits stored in the vacuum tubes. The next significant advance in computer memory came with acoustic [[delay-line memory]], developed by [[J. Presper Eckert]] in the early 1940s. Through the construction of a glass tube filled with [[mercury (element)|mercury]] and plugged at each end with a quartz crystal, delay lines could store [[bits of information]] in the form of sound waves propagating through the mercury, with the quartz crystals acting as [[transducer]]s to read and write bits. Delay-line memory was limited to a capacity of up to a few thousand bits. Two alternatives to the delay line, the [[Williams tube]] and [[Selectron tube]], originated in 1946, both using electron beams in glass tubes as means of storage. Using [[cathode-ray tube]]s, Fred Williams invented the Williams tube, which was the first [[random-access memory|random-access computer memory]]. The Williams tube was able to store more information than the Selectron tube (the Selectron was limited to 256 bits, while the Williams tube could store thousands) and was less expensive. The Williams tube was nevertheless frustratingly sensitive to environmental disturbances. Efforts began in the late 1940s to find [[non-volatile memory]]. [[Magnetic-core memory]] allowed for memory recall after power loss. It was developed by Frederick W. Viehe and [[An Wang]] in the late 1940s, and improved by [[Jay Forrester]] and [[Jan A. Rajchman]] in the early 1950s, before being commercialized with the [[Whirlwind I]] computer in 1953.<ref>{{cite web |title=1953: Whirlwind computer debuts core memory |url=https://www.computerhistory.org/storageengine/whirlwind-computer-debuts-core-memory/ |website=[[Computer History Museum]] |access-date=2 August 2019}}</ref> Magnetic-core memory was the dominant form of memory until the development of [[MOSFET|MOS]] [[semiconductor memory]] in the 1960s.<ref name="computerhistory1966" /> The first [[semiconductor memory]] was implemented as a [[Flip-flop (electronics)|flip-flop]] circuit in the early 1960s using [[bipolar transistors]].<ref name="computerhistory1966">{{cite web |title=1966: Semiconductor RAMs Serve High-speed Storage Needs |url=https://www.computerhistory.org/siliconengine/semiconductor-rams-serve-high-speed-storage-needs/ |website=[[Computer History Museum]] |access-date=19 June 2019}}</ref> Semiconductor memory made from [[discrete device]]s was first shipped by [[Texas Instruments]] to the [[United States Air Force]] in 1961. In the same year, the concept of [[Solid-state electronics|solid-state]] memory on an [[integrated circuit]] (IC) chip was proposed by [[applications engineers|applications engineer]] Bob Norman at [[Fairchild Semiconductor]].<ref>{{Cite web|url=https://www.computerhistory.org/storageengine/transistors-make-fast-memories/|title=1953: Transistors make fast memories {{!}} The Storage Engine {{!}} Computer History Museum|website=www.computerhistory.org|access-date=2019-11-14}}</ref> The first bipolar semiconductor memory IC chip was the SP95 introduced by [[IBM]] in 1965.<ref name="computerhistory1966"/> While semiconductor memory offered improved performance over magnetic-core memory, it remained larger and more expensive and did not displace magnetic-core memory until the late 1960s.<ref name="computerhistory1966"/><ref>{{cite book |last1=Orton |first1=John W. |title=Semiconductors and the Information Revolution: Magic Crystals that made IT Happen |date=2009 |publisher=[[Academic Press]] |isbn=978-0-08-096390-7 |page=104 |url=https://books.google.com/books?id=6YLL9197NfMC&pg=PA104}}</ref> === MOS memory === {{Main|MOS memory}} The invention of the metal–oxide–semiconductor field-effect transistor ([[MOSFET]]) enabled the practical use of [[metal–oxide–semiconductor]] (MOS) transistors as [[memory cell (computing)|memory cell]] storage elements. MOS memory was developed by John Schmidt at [[Fairchild Semiconductor]] in 1964.<ref>{{Cite book|url=https://books.google.com/books?id=kG4rAQAAIAAJ&q=John+Schmidt|title=Solid State Design - Vol. 6|date=1965|publisher=Horizon House}}</ref> In addition to higher performance, MOS [[semiconductor memory]] was cheaper and consumed less power than magnetic core memory.<ref name="computerhistory1970">{{cite web |title=1970: MOS Dynamic RAM Competes with Magnetic Core Memory on Price |url=https://www.computerhistory.org/siliconengine/mos-dynamic-ram-competes-with-magnetic-core-memory-on-price/ |website=[[Computer History Museum]] |access-date=29 July 2019}}</ref> In 1965, J. Wood and R. Ball of the [[Royal Radar Establishment]] proposed digital storage systems that use [[CMOS]] (complementary MOS) memory cells, in addition to MOSFET [[power devices]] for the [[power supply]], switched cross-coupling, [[switches]] and [[delay-line memory|delay-line storage]].<ref>{{cite conference |last1=Wood |first1=J. |last2=Ball |first2=R. |title=1965 IEEE International Solid-State Circuits Conference. Digest of Technical Papers |chapter=The use of insulated-gate field-effect transistors in digital storage systems |conference=1965 IEEE International Solid-State Circuits Conference. Digest of Technical Papers |date=February 1965 |volume=VIII |pages=82–83 |doi=10.1109/ISSCC.1965.1157606}}</ref> The development of [[silicon-gate]] [[MOS integrated circuit]] (MOS IC) technology by [[Federico Faggin]] at Fairchild in 1968 enabled the production of MOS [[memory chip]]s.<ref>{{cite web |title=1968: Silicon Gate Technology Developed for ICs |url=https://www.computerhistory.org/siliconengine/silicon-gate-technology-developed-for-ics/ |website=[[Computer History Museum]] |access-date=10 August 2019}}</ref> [[NMOS logic|NMOS]] memory was commercialized by [[IBM]] in the early 1970s.<ref>{{cite journal |last1=Critchlow |first1=D. L. |title=Recollections on MOSFET Scaling |journal=IEEE Solid-State Circuits Society Newsletter |date=2007 |volume=12 |issue=1 |pages=19–22 |doi=10.1109/N-SSC.2007.4785536 |doi-access= }}</ref> MOS memory overtook magnetic core memory as the dominant memory technology in the early 1970s.<ref name="computerhistory1970"/> The two main types of volatile [[random-access memory]] (RAM) are [[static random-access memory]] (SRAM) and [[dynamic random-access memory]] (DRAM). Bipolar SRAM was invented by Robert Norman at Fairchild Semiconductor in 1963,<ref name="computerhistory1966"/> followed by the development of MOS SRAM by John Schmidt at Fairchild in 1964.<ref name="computerhistory1970"/> SRAM became an alternative to magnetic-core memory, but requires six transistors for each [[bit]] of data.<ref name="ibm100">{{cite web |title=DRAM |url=https://www.ibm.com/ibm/history/ibm100/us/en/icons/dram/ |website=IBM100 |publisher=[[IBM]] |access-date=20 September 2019 |date=9 August 2017}}</ref> Commercial use of SRAM began in 1965, when IBM introduced their SP95 SRAM chip for the [[IBM System/360|System/360 Model 95]].<ref name="computerhistory1966"/> [[Toshiba]] introduced bipolar DRAM [[Memory cell (computing)|memory cells]] for its Toscal BC-1411 [[electronic calculator]] in 1965.<ref name="bc-spec">{{cite web|url=http://www.oldcalculatormuseum.com/s-toshbc1411.html|title=Spec Sheet for Toshiba "TOSCAL" BC-1411|website=Old Calculator Web Museum|access-date=8 May 2018|url-status=live|archive-url=https://web.archive.org/web/20170703071307/http://www.oldcalculatormuseum.com/s-toshbc1411.html|archive-date=3 July 2017}}</ref><ref name="bc">{{cite web |url=http://www.oldcalculatormuseum.com/toshbc1411.html |title=Toshiba "Toscal" BC-1411 Desktop Calculator |archive-url=https://web.archive.org/web/20070520202433/http://www.oldcalculatormuseum.com/toshbc1411.html |archive-date=2007-05-20}}</ref> While it offered improved performance, bipolar DRAM could not compete with the lower price of the then dominant magnetic-core memory.<ref>{{cite web |title=1966: Semiconductor RAMs Serve High-speed Storage Needs |url=https://www.computerhistory.org/siliconengine/semiconductor-rams-serve-high-speed-storage-needs/ |website=Computer History Museum}}</ref> MOS technology is the basis for modern DRAM. In 1966, [[Robert H. Dennard]] at the [[IBM Thomas J. Watson Research Center]] was working on MOS memory. While examining the characteristics of MOS technology, he found it was possible to build [[capacitors]], and that storing a charge or no charge on the MOS capacitor could represent the 1 and 0 of a bit, while the MOS transistor could control writing the charge to the capacitor. This led to his development of a single-transistor DRAM memory cell.<ref name="ibm100"/> In 1967, Dennard filed a patent for a single-transistor DRAM memory cell based on MOS technology.<ref>{{cite web |title=Robert Dennard |url=https://www.britannica.com/biography/Robert-Dennard |website=[[Encyclopedia Britannica]] |access-date=8 July 2019}}</ref> This led to the first commercial DRAM IC chip, the [[Intel 1103]] in October 1970.<ref name="Intel2003">{{cite web |title=Intel: 35 Years of Innovation (1968–2003) |url=https://www.intel.com/Assets/PDF/General/35yrs.pdf |publisher=Intel |year=2003 |access-date=26 June 2019 |archive-url=https://web.archive.org/web/20211104070452/https://www.intel.com/Assets/PDF/General/35yrs.pdf |archive-date=4 November 2021 |url-status=dead}}</ref><ref name="HC">[http://history-computer.com/ModernComputer/Basis/dram.html ''The DRAM memory of Robert Dennard''] history-computer.com</ref><ref name="Lojek-1103">{{cite book |last1=Lojek |first1=Bo |title=History of Semiconductor Engineering |date=2007 |publisher=[[Springer Science & Business Media]] |isbn=9783540342588 |pages=362–363 |url=https://books.google.com/books?id=2cu1Oh_COv8C&pg=PA362 |quote=The i1103 was manufactured on a 6-mask silicon-gate P-MOS process with 8 μm minimum features. The resulting product had a 2,400 µm, 2 memory cell size, a die size just under 10 mm², and sold for around $21.}}</ref> [[Synchronous dynamic random-access memory]] (SDRAM) later debuted with the [[Samsung Electronics|Samsung]] KM48SL2000 chip in 1992.<ref>{{cite web |title=KM48SL2000-7 Datasheet |url=https://www.datasheetarchive.com/KM48SL2000-7-datasheet.html |publisher=[[Samsung]] |access-date=19 June 2019 |date=August 1992}}</ref><ref name="electronic-design">{{cite journal |title=Electronic Design |journal=[[Electronic Design]] |date=1993 |volume=41 |issue=15–21 |url=https://books.google.com/books?id=QmpJAQAAIAAJ |publisher=Hayden Publishing Company |quote=The first commercial synchronous DRAM, the Samsung 16-Mbit KM48SL2000, employs a single-bank architecture that lets system designers easily transition from asynchronous to synchronous systems.}}</ref> The term ''memory'' is also often used to refer to [[non-volatile memory]] including [[read-only memory]] (ROM) through modern [[flash memory]]. [[Programmable read-only memory]] (PROM) was invented by [[Wen Tsing Chow]] in 1956, while working for the Arma Division of the American Bosch Arma Corporation.<ref name="Huang2008">{{cite book|author=Han-Way Huang|title=Embedded System Design with C805|url=https://books.google.com/books?id=3zRtCgAAQBAJ&pg=PA22|date=5 December 2008|publisher=Cengage Learning|isbn=978-1-111-81079-5|page=22|url-status=live|archive-url=https://web.archive.org/web/20180427092847/https://books.google.com/books?id=3zRtCgAAQBAJ&pg=PA22|archive-date=27 April 2018}}</ref><ref name="AufaureZimányi2013">{{cite book|author1=Marie-Aude Aufaure|author2=Esteban Zimányi|title=Business Intelligence: Second European Summer School, eBISS 2012, Brussels, Belgium, July 15-21, 2012, Tutorial Lectures|url=https://books.google.com/books?id=7iK5BQAAQBAJ&pg=PA136|date=17 January 2013|publisher=Springer|isbn=978-3-642-36318-4|page=136|url-status=live|archive-url=https://web.archive.org/web/20180427092847/https://books.google.com/books?id=7iK5BQAAQBAJ&pg=PA136|archive-date=27 April 2018}}</ref> In 1967, Dawon Kahng and [[Simon Sze]] of Bell Labs proposed that the [[floating gate]] of a MOS [[semiconductor device]] could be used for the cell of a reprogrammable ROM, which led to [[Dov Frohman]] of [[Intel]] inventing [[EPROM]] (erasable PROM) in 1971.<ref name="computerhistory1971">{{cite web |title=1971: Reusable semiconductor ROM introduced |url=https://www.computerhistory.org/storageengine/reusable-semiconductor-rom-introduced/ |website=[[Computer History Museum]] |access-date=19 June 2019}}</ref> [[EEPROM]] (electrically erasable PROM) was developed by Yasuo Tarui, Yutaka Hayashi and Kiyoko Naga at the [[Electrotechnical Laboratory]] in 1972.<ref>{{cite journal|last1=Tarui|first1=Y.|last2=Hayashi|first2=Y.|last3=Nagai|first3=K.|title=Electrically reprogrammable nonvolatile semiconductor memory|journal=IEEE Journal of Solid-State Circuits|date=1972|volume=7|issue=5|pages=369–375|doi=10.1109/JSSC.1972.1052895|issn=0018-9200|bibcode=1972IJSSC...7..369T}}</ref> Flash memory was invented by [[Fujio Masuoka]] at [[Toshiba]] in the early 1980s.<ref>{{cite web |last=Fulford |first=Benjamin |title=Unsung hero |work=Forbes |date=24 June 2002 |access-date=18 March 2008 |url=https://www.forbes.com/global/2002/0624/030.html |url-status=live |archive-url=https://web.archive.org/web/20080303205125/http://www.forbes.com/global/2002/0624/030.html |archive-date=3 March 2008 |df=dmy-all }}</ref><ref>{{patent|US|4531203|Fujio Masuoka}}</ref> Masuoka and colleagues presented the invention of [[NOR flash]] in 1984,<ref>{{cite web |title=Toshiba: Inventor of Flash Memory |url=http://www.flash25.toshiba.com |website=[[Toshiba]] |access-date=20 June 2019}}</ref> and then [[NAND flash]] in 1987.<ref>{{cite conference |chapter=New ultra high density EPROM and flash EEPROM with NAND structure cell |last1=Masuoka |first1=F. |last2=Momodomi |first2=M. |last3=Iwata |first3=Y. |last4=Shirota |first4=R. |title=1987 International Electron Devices Meeting |year=1987 |pages=552–555 |conference=[[International Electron Devices Meeting|IEDM]] 1987 |book-title=Electron Devices Meeting, 1987 International |publisher=[[IEEE]] |df=dmy |doi=10.1109/IEDM.1987.191485}}</ref> Toshiba commercialized NAND flash memory in 1987.<ref name=":0">{{cite web |title=1987: Toshiba Launches NAND Flash |url=https://www.eweek.com/storage/1987-toshiba-launches-nand-flash |website=[[eWeek]] |date=April 11, 2012 |access-date=20 June 2019}}</ref><ref>{{cite web |title=1971: Reusable semiconductor ROM introduced |url=https://www.computerhistory.org/storageengine/reusable-semiconductor-rom-introduced/ |website=[[Computer History Museum]] |access-date=19 June 2019}}</ref><ref name=":2" /> Developments in technology and economies of scale have made possible so-called '''{{vanchor|very large memory}}''' (VLM) computers.<ref name=":2">{{cite book |last = Stanek |first = William R. |title = Windows Server 2008 Inside Out |url = https://books.google.com/books?id=SbxixF4iAEcC |access-date = 2012-08-20 |year = 2009 |publisher = O'Reilly Media, Inc. |isbn = 978-0-7356-3806-8 |pages = 1520 |quote = [...] Windows Server Enterprise supports clustering with up to eight-node clusters and very large memory (VLM) configurations of up to 32 GB on 32-bit systems and 2 TB on 64-bit systems. |url-status = live |archive-url = https://web.archive.org/web/20130127064935/http://books.google.com/books?id=SbxixF4iAEcC |archive-date = 2013-01-27 }}</ref>
Summary:
Please note that all contributions to Niidae Wiki may be edited, altered, or removed by other contributors. If you do not want your writing to be edited mercilessly, then do not submit it here.
You are also promising us that you wrote this yourself, or copied it from a public domain or similar free resource (see
Encyclopedia:Copyrights
for details).
Do not submit copyrighted work without permission!
Cancel
Editing help
(opens in new window)
Search
Search
Editing
Computer memory
(section)
Add topic