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== History == Early ASICs used [[gate array]] technology. By 1967, [[Ferranti]] and Interdesign were manufacturing early [[bipolar transistor|bipolar]] gate arrays. In 1967, [[Fairchild Semiconductor]] introduced the Micromatrix family of bipolar [[diode–transistor logic]] (DTL) and [[transistor–transistor logic]] (TTL) arrays.<ref name="computerhistory1967">{{cite web |title=1967: Application Specific Integrated Circuits employ Computer-Aided Design |url=https://www.computerhistory.org/siliconengine/application-specific-integrated-circuits-employ-computer-aided-design/ |website=The Silicon Engine |publisher=[[Computer History Museum]] |access-date=9 November 2019}}</ref> [[Complementary metal–oxide–semiconductor]] (CMOS) technology opened the door to the broad commercialization of gate arrays. The first CMOS gate arrays were developed by Robert Lipp,<ref>{{Cite book|url=http://www.computerhistory.org/collections/catalog/102706880|title=Lipp, Bob oral history|website=[[Computer History Museum]]|date=14 February 2017|publisher=Computer History Museum|access-date=2018-01-28}}</ref><ref>{{Cite web|url=http://www.computerhistory.org/siliconengine/people/|title=People|website=The Silicon Engine|publisher=Computer History Museum|access-date=2018-01-28}}</ref> in 1974 for International Microcircuits, Inc. (IMI).<ref name="computerhistory1967"/> [[Metal–oxide–semiconductor]] (MOS) [[standard-cell]] technology was introduced by Fairchild and [[Motorola]], under the trade names Micromosaic and Polycell, in the 1970s. This technology was later successfully commercialized by [[VLSI Technology]] (founded 1979) and [[LSI Logic]] (1981).<ref name="computerhistory1967"/> A successful commercial application of [[gate array]] circuitry was found in the low-end 8-bit [[ZX81]] and [[ZX Spectrum]] [[personal computer]]s, introduced in 1981 and 1982. These were used by [[Sinclair Research]] (UK) essentially as a low-cost [[Input/output|I/O]] solution aimed at handling the [[Computer graphics|computer's graphics]]. Customization occurred by varying a metal interconnect mask. Gate arrays had complexities of up to a few thousand gates; this is now called [[mid-scale integration]]. Later versions became more generalized, with different [[Die (integrated circuit)|base dies]] customized by both metal and [[Polycrystalline silicon|polysilicon]] layers. Some base dies also include [[random-access memory]] (RAM) elements.
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